HP Series 37, Reference Manual

Page 1: ...Series 37 Self Test and Maintenance Mode Part i io 30457 90003 E1184 lJ K AWo 8010 Foothills Blvd CA 95014 Reference Manual Printed in u S A 11 84 ...

Page 2: ...incidental or consequential damages in connection with the furnishing performance or use of this material Hewlett Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett Packard I This document contains proprietary information which is protected by cOPYrIght All nghts are reserved No part of this document may be photocopied reprodu...

Page 3: ...nto a reprinting unless it appears as a prior update the edition does not change when an update is incorporated The software code printed alongside the date indicates the version level of the software product at the time the manual or update was issued Many product updates and fixes do not require manual changes and conversely manual corrections may be done without accompanying product changes The...

Page 4: ... in the manual To verify that your manual contains the most current information check the dates printed at the bottom of each page with those listed below The date on the bottom of each page reflects the edition or subsequent update in which that page was printed NOV 84 iv Effective Pages all Date Nov 1984 ...

Page 5: ...eyswitch Capabilities Power on Self Test Execution Maintenance Mode Test Mode Remote Operator Interface Section 3 COMMAND DESCRIPTIONS Introduction Maintenance Mode Commands Automatic Warmstart Auto Restart Coldstart Coolstart Disc Dump Help Load Newsystem Panel Reload Run Speed Start Tape Test Update Warmstart CONTENTS 1 1 I I I I 1 2 1 2 1 2 1 3 1 3 1 4 2 1 2 1 2 2 2 3 2 5 6 2 5 6 3 1 3 1 3 1 3 ...

Page 6: ...or Codes TIC Test Section 1 TIC Test Section 2 TIC Test Section 3 TIC Test Section 4 TIC Test Section 5 TIC Test Section 6 TIC Test Section 7 PIC Test Error Codes PIC Test Section 1 PIC Test Section 2 PIC Test Section 3 PIC Test Section 4 PIC Test Section 5 PIC Test Section 6 PIC Test Section 7 PIC Test Section 8 PIC Test Section 9 CPU Test Error Codes Memory Test Error Codes 3 8 3 9 3 10 3 11 3 1...

Page 7: ...URES AND TABLES LIST OF TABLES Table 2 1 Keyswitch Capabilities Table 2 2 LED Indications and Error Conditions Table 2 3 Maintenance Mode Commands Table 2 4 Test Mode Commands 2 1 2 2 2 4 2 5 6 NOV 84 vii ...

Page 8: ...start after power failure REQUIRED HARDWARE The minimum hardware required to run Self Test to completion is a console connected to TIC channel l port 0 and the HP 3000 Series 37 which includes CPU Memory TIC The power on self test sequence is CPU Memory TIC and PIC If a required peripheral is not connected all tests performed before that peripheral is required are valid To use certain features of ...

Page 9: ...wer On Selftest PON and a ROM Code Loader The code in WCS is then executed The basic CPU chip test a general WCS test and a ROM code loader are in ROM This code tests some of the Series 37 CPU chip functions The last CPU chip function tested is all of Slow WCS and then additional CPU test modules are loaded These modules test the remaining CPU chip functions When these tests are complete the Maint...

Page 10: ...lishing a link to the remote console 1 Issue a speed command to set the System Console to a speed that is compatible with both the modem and the terminal to be used in the remote location 2 Set the keyswitch to the remote position This causes the Data Terminal Ready DTR to temporarily drop disconnecting any pre established links MPE will log off the session on Port 7 3 The remote site must establi...

Page 11: ... g the keyswitch to positlOll I NORMAL This C luses the DTR to drop temporarily 3 4 seconds which disconnects the modem MPE will log off the session on Port and the REMOTE light will go out The remote consl le will no longer display the same information as the lo al console lOV 84 1 4 ...

Page 12: ...the TIC in slot I channel 1 can have the the Control B logic enabled To enable the logic the keyswitch must be in either the T ocal or Remote position Note also that only the System Console connected to port 0 local or port 7 remote can execute the Maintenance Mode commands KEYSWITCH CAPABILITIES The Keyswitch directly effects the function of certain Maintenance Mode commands These are described i...

Page 13: ...ping was previously specified from the test mode the Power on Self Te will be looped until the loop count rearhes O However if the keyswitch was changed to the 1 NORMAL position the looping feature is disabled and PON will be executed only once When all tests have been successfully completed Maintenance Mode is entered The following prompt is displayed H for heip If any errors are reported on eith...

Page 14: ...device has been set up by the P and C options The DUM P command always defa IIts to the START device The P option updates the LOAD or START device data in the TOC and initiah the LOAD or START The TOC is a permanent storage area for system information which includes the default START and LOAD device numbers The TOC LOAD or START data can also be updated with the C option but the LOAD or START is n...

Page 15: ...VST M Perform initial software installatIOn PANEL Enter Soft Panel RELOAD Perform RELOAD using LOAD device Refer to Note 1 belc w RUN RUN system after Control B halt SPEED All w the System Operator to lhange System Console peed START Perform START has options Refer to Note 2 below TAPE Perform LOAD USlIlg LOAD deVIce Refer to ote 2 below TEST Go to Self Test mode UPDATE Perform UPDATE using LOA de...

Page 16: ... via modem or hardwi configuration The keyswitch is in Remote or Local after having been in Remote but not s tched through Normal mode and the REMOTE LED is on The System Console the modem and the remote comoIe are all operating at the same baud rate The hardwire configuration requires a standard 25 pin straight through mod m cable with pins 4 and 22 to be tied together Table 2 4 Test Mode Command...

Page 17: ...eries 37 systems is enabled by the EW Enable Warmstart command Automatic warmstart is disabled with DW Disable Warmstart The state of the Automatic Warmstart is maintained during power off If Autowarmstart is enabled the Series 37 will issue the following prompt after being powered on and PON is successfully completed WARMSTART yiN The user has 15 seconds to abort the automatic warmstart If the us...

Page 18: ...pleted execution is transferred to the Auto Restart entry 500 I in the Loader code module The WCS boot cuie is executed with the Auto Restart flag and LOAD Start flags with the start device set into register file location EF If the Auto Restart should fail because the disc was not ready up to 4 retries will be made If the retries are not successful return will be to the Maintenance Mode H fo r he ...

Page 19: ...e allowed The default Start device is always used The correct syntax for this command is DIS c k Dump Dump loads the Dum software from the indicated device and transfers execution to the dump software The DUMP command 2 lIowS optional channel and clevic9 parameters to indicate the location of the dump software normally the system disc F no parameters are supplied the dump software is loaded from t...

Page 20: ...RT RELOAD or UPDATE operations for MPE or to run DUS If channel and device are specified LOAD uses these parameters as the channel and device for the LOAD The default LOAD channel and device are also updated in the TOC register C if the optional perm or change parameters are specified The LOAD command allows the System Operator to perform a LOAD using the default LOAD device number stored in the T...

Page 21: ...s the operator INITIAL dialogue will be invoked by INITIAL This command performs a RELOAD function l asing any existing user files on the system discs It should be used only for the initial software installation The correct syntax for this command is NE wsystem Panel The PANEL command enters the Softpanel Mode The commands available in Softpanel Mode are described in Section IV SOFTPANEL Reload Th...

Page 22: ...d device are specified the START command uses these parameters as the channel and device for the START The default START channel and device are also updated in the TOC register B if the optional perm or change parameters are specified The START command allows the operator to perform a START using the default START channel numbers stored in the TOC RAM specify a different device or just change the ...

Page 23: ...Self Test E ecutive which displays all of the Self Test capabilities and the Test Mode prompt If software was running when Maintenance Mode was entered the operator will be prompted with Do you want to abo rt the system yiN If a Y is entered or software was not running then the Test Executor module is loaded and control is transferred to the Test Mode entry point in the Test Executor module If not...

Page 24: ...s exactly like the START command with the following exceptions No channel or device parameters are allowed The default START device is always used A warmstart can be run without any interaction by the System Operator no I ITIAL dialogue The correct syntax for this command is WAR mstart TEST MODE COMMANDS Test Mode is entered with the Maintenance Mode TEST command The Test Mode allows all of the Se...

Page 25: ...following illustrates the use of the ALL command 1 NORMAL Test AL TOC RAM Addr Data 0008 0000 0009 0000 OOOA 0000 0008 0000 OOOC 0004 0000 OOOE OOOE 0000 OOOF 0000 00serve LED display cycle O F CPU test passed Memory Test passed Slot 1 Channel 1 Terminal Interface Controller Slot 4 Channel 4 Peripheral Interface Channel Test Passed System I O Configuration Number of banks 4 Load Channel 4 Device 3...

Page 26: ...IPOLL SMSK and RMSK and venfy that they respond properly Port register tesls Write patterns to registers 0 7 of ports 0 7 and verify the data Diagnostic loopback using DMA sequencer ROM Initiate PCC tests on all 8 ports Perform DMA data loopback test on all 8 ports In addition the console TIC is both speed sensed and communication lines are tested with the local console The PIC test has nine secti...

Page 27: ...ed MPE timer counting verified Watchdog Timer Force Condition verified The tests not performed by this CPU test but that are executed by the Power on CPU test are ROM Checksum Test Full Nezumi chip test Full Fast and Slow WCS address and Data Test Register File Address and Data Test Test all of the Bank registers P D S Al tests the TOC RAM locations ensures that the TOC and MPE timers are counting...

Page 28: ...ye Ie O F CPU test passed 1 NORMAL Test The Test Mode EXIT command returns execution to the Maintenance Mode and displays the H for help prompt The correct syntax for this command is E xit The following illustrates the use of EXIT Test E H for help Help This command does not appear in the Test Mode menu When issued HELP will display the available Test Mode command and the ROM version numbers The c...

Page 29: ...s installed in the system For PIC cards all supported HPIB devices attached to the PIC are identified and their ID code is displayed along with a device description This command runs the memory size portion of the memory test and lisplays the size of memory lists the LOAD and START DUMP devices and then displays the types of cards installed in the system The types of devices on the PICs are also d...

Page 30: ...orms an Address Test performs a Pattern Test and then performs an Error Detection And Correction Test EDAC The memory is left with 30F8 halt 8 in all locations The full memory test is run and a pass fail message is sent to the System Console If a failure occurrs the number of the failing section is displayed The test may be looped by specifying the desired number of loops in oount Count must be an...

Page 31: ... PON test is initiated by toggling the PON line NOTE This command can not be run from keyswitch positions 3 or 1 from 3 REMOTE and LOCAL from REMOTE respectively The correct syntax for this command is PON oount The following illustrates the use of paN 2 LOCAL from Normal Self Test PON Power on Self Test Memory Test passed Number of banks Slot 1 Channel Slot 4 Channel 1 4 4 2 LOCAL from Normal Self...

Page 32: ...eric field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a One of the following numeric fields limited to a 16 bit maximum The current radix numeric field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a r Is a combination of numerio and op Operations are performed from left to right with no precedence One of ...

Page 33: ...lds limited to a 16 bit maximum The current radix numeric field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a COMMAND OESCRtPTIO S Display Memory The 0 command continues from where we last left off and displays anotber half screen full of data AU display commaads display in the current radix refer to SDM Set Display Model command The display command w...

Page 34: ... current address current contents and waits for the user to input a new value This value can be input using a numeric field using the current default radix or may be forced using the radix forces or The command will terminate when the user inputs either or in reponse to the prompt The options are MA expr t lexprl MEA bank expr lexpr MSY expr lexpr exprll MDB expr l lexpr exprll MDL expr l t lexpr ...

Page 35: ...bsolute address in the MPB register Modify the absolute address in the P register Modify the absolute address in the PL register The DR command will display the common registers i e P PB PL CIR DB Q S etc If no field is specified to DR then all common registers will be displayed The options are reg BR regfile countJ reg MR regfile Execution Control The options are E Exit back to Maintenance Mode R...

Page 36: ...o the current environment The options are T numeric numeric Trace stack ENV numeric Change the environment RTOC tocaddr Read TOC RAM address WTOC tocaddr tocdata Write TOC RAM with data Change the current radix H Hex 0 Octal 5T Give Softpanel status Memory Breakpoints Using the SIMB breakpoint board in conjunction with the softpanel allows for breaking on absolute memory addresses for software deb...

Page 37: ...attern MUST contain a sequence of 16 ones zeros and xs The SMD command when used must follow the setting up of the range SB Shows the current state of the breakpoints A and B the ranging flag and the data pattern CPU ROMS Date Code 3444 Exceptions I The Softpanel ENV command One would expect ENV ato turn the ENV feature off Instead it prints Whoops 5 below Q Env Aborted The workaround is to type E...

Page 38: ...nd issued to values outside the range 0 to 1 F will return some value It seems to be the TOC register address modulo 20 decimal 32 i e RTOC 5 RTOC 25 RTOC 45 etc all return the value from TOC register 5 9 In the Softpanel the Help text makes reference to a DZ register DZ really refers to the Z register in this line 10 The switch register SR is not in the default register display It may be displaye...

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Page 40: ...s is the initialization test It will initialize the TIC and then check that the registers contain expected data Code Error 0108 Register 8 initialization error expected 0800 0109 Register 9 initialization error expected 0800 010A Register A initialization error expected FFOO 010C Register C initialization error expected 0000 0100 Register D initialization error expected 0000 010E Register E initia...

Page 41: ...test failure TIC Test Sec tion 4 DMA test 1MB write Word Code Error 0401 DMA state machine failed to go to state 4 0402 DMA state machine failed to go to state 3 0403 DMA write to memory transferred improper data 0404 DMA read from memory to RBYTE transferred improper data 0405 DMA read from memory to LBYTE transferred improper data 0406 DMA counter test failed TIC Test Section 5 Port Self Test Co...

Page 42: ...0 Port 0 loopback failure 0601 Port I loopback failure 0607 Port 7 loopback failure TIC Test Section 7 DMA loopback data test Code Error 0700 Port 0 loopback data failure 0701 Port I loopback data failure 0707 Port 7 loopback data failure Error Codes NOV 84 A 3 ...

Page 43: ...expected 0087 8 channel PIC Test Section 2 Bo sic operations test OBII IPOLL SMSK RMSK Code Error 0201 SMSK RMSK test PIC did not respond with mask bit set 0202 SMSK RMSK test PIC did not respond with mask bit cleared 0203 PIC did not set IRQ after SMSK on selected channel 0204 Improper IPOLl response after SMSK no response wrong response or multiple channels responding 0205 Improper OBII data fro...

Page 44: ...er PIC Register 2 and Interrupt Mask Register PIC Register 3 Code Error 0401 Reg2 Bit 0 should be set an interrupt is pending 0402 Reg2 Bits 9 and 13 should be clear no handshake abort and inbound FIFO empty 0403 Reg2 Bit 12 should be set outbound FIFO room available 0404 Reg2 Bit 14 should be set outbound FIFO idle 0405 Reg2 Bit 8 should be clear no status change 0406 Reg2 Bit 0 should be clear n...

Page 45: ...it I 5 of Register 6 should be set clear outbound FIFO via the ABI Interrupt Register test Bits 12 and 14 of the ABI Interrupt Register should be clear PIC Test Section 7 Test PIC register 7 HPIB lIddress Code Error 0701 Register 7 fails to show patterns 800A for Read Write test 0702 Register 7 fails to show patterns 4015 for Read Write test 0703 Bit 9 of Reg 7 should be set Talk always via the AB...

Page 46: ... DMA Write Abort PIC reg E test 0902 Data transferred to the PIC FIFO by the above transfer assuming the DMA Write abort test passed is incorrect 0904 CSRQ response test via OBSI failed the DMA Write Abort 0905 Bit 5 of PIC register B should be set for the DMA Write Abort termination test 0906 Bit 6 of PIC register B should be set for the DMA Write Abort termination test 0907 CSRQ response test vi...

Page 47: ...k write failure 0102 Dbank read Sbank write failure 0103 Sbank read Dbank write failure 0104 Abank read Pbank write failure Test Section 2 Toe RAM tests 0201 Toe RAM test not done Pfail 0202 Toe RAM data failure Test Section 3 Toe count verification 0203 TOC not counting Test Section 4 MPE timer verification 0301 TOC not counting Test Section 5 LED display There are no failure codes in this sectio...

Page 48: ...the same sequence as the test sections and that the test stops on the first failure found Code Error 0001 Memory size test failed 0002 Memory Initialization test failed 0003 unassigned 0004 Error Detection and Correction EDAC test failed 0005 Memory address test failed 0006 Memory pattern test failed FOFO Memory dead watchdog timer failure NOV 84 A 9 10 ...

Page 49: ...Part No 30457 90003 Printed in U S A 11 84 El184 HEWLETT E PACKARD ...

Page 50: ...Part No 30457 90007 E0984 HP 3000 Series 37 SERIES 37 MEMORY Diagnostic Manual lJ i 6 8010 Foothills Blvd Roseville CA 95678 Printed in U S A 09 84 ...

Page 51: ...incidental or consequential damages in connection with the furnishing performance or use of this material Hewlett Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett Packard I This document contains proprietary information which is protected by cOPYright All nghts Jre reserved No part of this document may be photocopied reprodu...

Page 52: ...al and replacement pages to be merged into the manual by the customer The dates on the title page change only when a new edition or a new update is published No information is incorporated into a reprinting unless it appears as a prior update the edition does not change when an update is incorporated First Edition SEP 1984 SEP 84 iii ...

Page 53: ... in the manual To verify that your manual contains the most current information check the dates printed at the bottom of each page with those listed below The date on the bottom of each page reflects the edition or subsequent update in which that page was printed SEP 84 iv Effective Pages Date all SEP 1984 ...

Page 54: ...To Run MDIAG37 2 2 2 6 How To Configure MDIAG37 2 4 Section 3 TEST DESCRIPTIONS 3 0 Introduction 3 1 3 1 Test Section 1 3 1 Low Memory Diagnostic Compatability Test 3 1 3 2 Test Section 2 3 2 EDAC Test 3 2 3 3 Test Section 3 3 5 Address Test 3 5 3 4 Test Section 4 3 6 Alternating Ones and Zeros Test 3 6 3 5 Test Section 5 3 8 Data Pattern Test 3 8 3 6 Test Section 6 3 9 Move Data Test 3 9 3 7 Test...

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Page 56: ...rcuitry and verify the correct operation of the Error Detection and Correction circuit EDAC MDIAG37 is written in SPL and is run under the Diagnostic Utility System DUS 1 1 REQUIRED HARDWARE The hardware required to run MDJAG37 is the HP 3000 Series 37 minimum configuration Console connected to the TIC at slot 1 port 0 HP IB Tape Drive SPU with the following board set CPU Memory TIC PIC located in...

Page 57: ... is intended to isolate specific RAM and or EDAC failures The system to be tested needs to be functioning well enough to load DUS Multiple bit errors will cause MDIAG37 to lose control over error reporting and the ability to recover from the interrupt EXCEPT during Test Section 2 All other test sections will display the following message System Halt 6 CPU memory parity error multi bit error The nu...

Page 58: ...disabled The standard default selects all tests If you want to run a simple go no go version of MDIAG37 select the following test list I Test Section 1 Low Memory Diagnostic Compatability Test 2 Test Section 2 EDAC Test 3 Test Section 3 Address Test 4 Test Section 6 Move Data Test 5 Test Section 9 Log Test To change the test selection enter TEST then enter a _ in front of the test number s to be d...

Page 59: ...of messages error and information Error messages tell you that the memory has failed to respond properly to a test Error messages cannot be suppressed but can be directed to a printer instead of to the console PEMP Information messages can be suppressed SNDP 2 5 HOW TO RUN MDIAG37 Input to MDIAG37 is through the system console after Test Section I has run or during program pauses Run the memory di...

Page 60: ...ction 1 Type GO to Continue HELP to list commands 9 At this point GO will execute the default tests all tests after Section 1 To change the test selection enter TEST with a _ in front of the test numbers to delete those tests or a in front of the test numbers to add those tests Without a or a MDIAG37 will perform just those test sections listed Examples TEST 5 6 7 or TEST 5 7 will delete tests 5 7...

Page 61: ... of program pause Enable Error Pause halts after error occurs Enable Non error Display allows information messages I Exits the diagnostic returns to DUS resumes program at current step I allows diagnostic to continue at current step lists commands I lists available commands with a brief description I List Diagnostic Status I Lists the following information I which test sections are enabled ENDP fl...

Page 62: ...Pause SNDP Suppress Non error Display TEST n Specify Test s to be executed default configuration DESCRIPTION overrides LOOPTST and LOOPERR lists available tests with a brief description uses printer that is defined in DUS I O table allows you to restart the diagnostic returns to DUS does not pause after error suppresses informational messages allows you to select tests with a delete tests with a N...

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Page 64: ...decodes the syndrome codes NOTE I This section does NOT allow the Loop on Error option Step 11 Low Memory Test This step reads the lowest 256K bytes of memory banks 0 and 1 to check for double bit hardware errors If there are any double bit errors in bank 0 or bank 1 MDIAG37 will not run This step does NOT have the Loop on Error option The displayed failure indication will be a multiple bit error ...

Page 65: ... option Step 14 Clear Memory Status This step reads the memory status of I or 2 boards to clear the error syndrome code It does NOT have the Loop on Error option 3 2 TEST SECTION 2 rGDAC Test This section performs a simple pattern test on all memory boards present It then checks the Error Detection and Correction Circuit EDAC to ensure that the board will function correctly with single bit errors ...

Page 66: ...verify that the syndrome latch is cleared Error messages Multi error was detected during single bit error test Board Y Block Y Where Y 0 1 Error in test word was not corrected data bit XX Board Y Block Y Data expected AAAAAA Data received ZZZZZZ Where 0 XX 31 Y 0 1 AAAAAA and ZZZZZZ octal data Syndrome code expected was not returned data bit XX Board Y Block Y Expected AAA Received ZZZ Where 0 XX ...

Page 67: ...proper handling The syndrome latch is checked for proper error logging SEP 84 3 4 Error messages Multi error was detected during double bit error test Board Y Block Y Where Y 0 1 Syndrome code expected was not returned Board Y Block Y Expected AAA Received ZZZ Where Y 0 1 AAA and ZZZ octal syndrome codes Syndrome latch was not cleared after status was reported Board Y Where Y 0 1 ...

Page 68: ...data If this test fails the unique address capability may have failed The following messages will appear during test execution Begin Section 3 Begin Step 31 All of tested memory has been written Pass 1 completed Begin Pass 2 All of tested memory has been written Step 31 completed End of Section 3 Error message Expected XXXXXX Received YYYYYY Address r ZZZZZZ Bank W Board A Where XXXXXX data expect...

Page 69: ...her any single bit errors were detected SEP 84 3 6 The following message will appear during test execution Begin Sect ion 4 Begin Step 41 All of tested memory has been written Pass 1 completed Begin Pass 2 All of tested memory has been written Step 41 completed End of Section 4 The following error message will be displayed only if error correction is NOT working Expected XXXXXX Received yyyyyy Add...

Page 70: ...ror was detected during the test Bad memory chips are identified only by the error latch information Error message Single bit error detected Board X Syndrome Code r VVV Chip Number UZZZZ Where X 0 1 YYY octal syndrome code UZZZZ Reference Designator of faulty RAM SEP 84 3 7 ...

Page 71: ...5 Begin Step 51 Test is half way to completion Step 51 completed End of Section 5 The following error message will be displayed only if error correction is NOT working Expected XXXXXX XXXXXX Received f YYYYYY yyyvYY Address f zzzzzz Bank W Board A Where XXXXXXXXXXX c data expected in octal YYYYYYYYYYY data received in octal ZZZZZZ address of error in octal 0 Z I 77777 W bank with error 0 W 31 A 0 ...

Page 72: ...r latch is checked after each 32K byte move operation This step uses the Move Absolute Iustruction for speed and simplicity This step is repeated using the 32K bytes of each block as the data to write back into that block Error message Single bit error detected Board X Syndrome Code YYY Chip Number UZZZZ Where X 0 1 YYY octal syndrome UZZZZ Reference Designator of faulty RAM SEP 84 3 9 ...

Page 73: ...ach 32K byte block of memory is completed SEP 84 3 10 The following error messsage will be displayed only is error correction is NOT working Expected XXXXXX Received YYYYYY Address ZZZZZZ Bank W Board A Where XXXXXX data expected in octal YYYYYY data received in octal ZZZZZZ address of error in octal 0 Z I 7777 W bank with error 0 W 31 A 0 1 The error latch information will be displayed if an erro...

Page 74: ...s are written and read by the diagnostics Any errors are recorded in the error latch Because of limitationi imposed by the relocation of the diagnostic only the last error encountered by the marching test will be reported Step 83 Program Re Relocation This step relocates the program back to its original area in lower main memory The memory status is checked and any errors that were encountered in ...

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Page 76: ...a bit 0 254 data bit 1 264 data bit 2 324 data bit 3 24 data bit 4 344 data bit 5 44 data bit 6 104 data bit 7 72 data bit 8 132 data bit 9 232 data bit 10 152 data bit 11 252 data bit 12 312 data bit 13 162 data bit 14 322 data bit 15 216 data bit 16 56 data bit 17 66 data bit 18 126 data bit 19 226 data bit 20 SEP 84 A I ...

Page 77: ... bit 31 176 check bit 0 276 check bit 1 336 check bit 2 356 check bit 3 366 check bit 4 372 check bit 5 374 check bit 6 NOTE 1 There is a decimal octal hexidecimal conversion chart at the beginning of this diagno tic manual set SEP 84 A 2 2 The syndrome codes in this table are transposed and then shifted one bit to the left from those listed in the manufacturer s data sheet for the EDAC chip This ...

Page 78: ...HP 3000 Series 37 TERMINAL INTERFACE CONTROLLER Part No 30457 90004 E0984 F 43 HEWLETT PACKARD 8010 Foothills Blvd Roseville CA 95678 Diagnostic Manual Printed in U S A 09 84 ...

Page 79: ... for incidental or consequential damages in connection with the furnishing performance or use of this material I Hewlett Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett Packard I i ThIS document contains propnetary information which is protected by copyright All rights are reserved No part of this document may be photocopie...

Page 80: ...al and replacement pages to be merged into the manual by the customer The dates on the title page change only when a new edition or a new update is published No information is incorporated into a reprinting unless it appears as a prior update the edition does not change when an update is incorporated First Edition SEP 1984 SEP 84 iii ...

Page 81: ... in the manual To verify that your manual contains the most current information check the dates printed at the bottom of each page with those listed below The date on the bottom of each page reflects the edition or subsequent update in which that page was printed SEP 84 iv Effective Pages all Date SEP 1984 ...

Page 82: ...s Section 2 OPERATING INSTRUCTIONS 2 0 Introduction 2 I Looping 2 2 TIC Diagnostic Commands Section 3 TEST DESCRIPTIONS 3 0 Introduction 3 1 Get Test Data 3 2 System Interface Board SIB Tests Table of Conten t 3 3 Asynchronous Interface Board AlB Tests Section 4 ERROR INTERPRETATION 1 1 1 1 1 1 1 2 1 3 1 4 2 1 2 1 2 1 3 1 3 1 3 1 3 4 4 0 Introduction 4 1 SEP 84 v ...

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Page 84: ...The hardware required to run the TICDIAG is the HP 3000 Series 37 minimum configuration Console connected to the TIC at slot I port 0 HP IB Tape Drive SPU with the following board set CPU Memory PIC TIC needed as a coldload path to load DUS must work well enough to initiate the TICDIAG To test port 7 the modem port on the TIC a modem loopback hood HP 30146 60002 is required A different hood is req...

Page 85: ...ey affect all ports The tests in the AlB section test the circuitry from the L Bus to the cable connector and affect only one selectable port at a time The TICDIAG loop is very simple It calls Get Test Data to get input from the user The SIB is theh initialized and the SIB tests if selected are run If the SIB sectIOn is successfully completed the AlB is initialized for testing and the selected tes...

Page 86: ...a particular configuration Channel Number of TIC Under Test 1 Other than 1 1 I I Other than I 1 1 Output Channel Directed Number of Tests Allowed To Console All AlB Tests Except Port 0 Console 1 Stop on error allowed Console 1 All Tests SIB and AlB I Stop on error allowed I I I All Tests S18 and AlB Printer I 1 No control y break Printer I 1 All Tests SIB and AlB Other than All Tests SIB and AlB C...

Page 87: ...cuitry of the TIC PCA is not tested by the TICDIAG This circuitry includes the LOCAL REMOTE circuitry and the Disconnect circuitry The functions of the ROJ circuitry can be tested through a manual procedure Control Band warmstart circuitry are not tested by the TICDIAG SEP 84 1 4 ...

Page 88: ...of faulty components All input to the TICDIAG is done via the system console 2 1 LOOPING You can select one of two types of looping The first type loops the specified number of times that you enter in response to a prompt The loop count can be from I to 32 767 Continuous looping can be specified by entering a O The SIB tests are run the specified number of times and then the AlB tests are run the ...

Page 89: ...eturn the keyswitch back to NORMAL 7 The Diagnostic Utility system will display a welcome message and a prompt DIAGNOSTIC UTILITY SYSTEM REVISION nn nn ENTER YOUR PROGRAM NAME TYPE HELP fOR PROGRAM INfORMATION 8 Type TICDIAG in response to the prompt 9 The TICDlAG loads and executes_ The following message is displayed TERMINAL INTERfACE CARD OffLINE DIAGNOSTIC V nn nn Enter HELP in response to any...

Page 90: ...under test and the output is not directed to the line printer TICDIAG will ask if you wish to change the system console to another TIC and port CHANGE THE SYSTEM CONSOLE DEFAULT NO If answered YES CHANNEL NUMBER OF TIC TO SWITCH THE CONSOLE TO 13 If the console is the list device you can select to stop on errors STOP ON ERRORS DEFAULT NO If you answered Yes then when an error is detected you are p...

Page 91: ...IM BOARD ENABLE BO PORT POINTER P FREEZE FR TIC BUS BUFFERS TIC DIRECT COMMAND DI FIFO FI STATE COUNTER ST DMA ADDRESS COUNTER DM COMP CTR LOOPBACK C READ 1MB REA WRITE 1MB W BEGIN FLAG LEFT RIGHT FLAG BE ALL AL NONE N RETURNl The test names can be abbreviated as indicated You can enter a list of tests separated by semicolons ALL indicates that all available SIB tests are to be run NONE indicates ...

Page 92: ...breviated as indicated You can enter a list of tests separated by semicolons ALL indicates that all available AlB tests are to be run ALL NO LooPBACK indicates all AlB tests are to be run except those that require a loopback hood Modem Signals test Modem Address test and Loopback test NONE indicates that testing of the AlB is not to be done Pressing carriage return in response to this question wil...

Page 93: ...er integer J J If the list of ports is omitted the last set of ports that you selected will be tested The lists of ports can include individual numbers and ranges of numbers For example 1 3 5 7 would be a valid list of numbers It would specify that ports 1 2 3 5 and 7 are to be tested 19 TICDIAG then proceeds to test the TIC PCA Upon completion a message is displayed During the executi0l of the TI...

Page 94: ...1MB SIB COMMUNICATION Tests the SIB to insure that all allowable Intermodule Bus 1MB commands work As each I B command is executed two types of error messages can be printed The first type indicates that the instruction was not successful The second type indicates that the SIB response was not the expected response Test 2 INITIAL REGISTER VALUES Tests the values that are obtained from the SIMB reg...

Page 95: ... that is on the SIB section of the TIC This logic includes the board enable register and the L Bus State Machine The tests are as follows I An INIT command is issued to clear the board 2 The Diagnostic Control Register is set up to single step and turn LOOPEN off 3 Single steps the board and checks that the FPLA L Bus State Machine cycles between States 0 and 4 4 Enables the board by writing to Re...

Page 96: ...sts the operation of the FIFO It checks the following 1 that an interrupt is not present after channel INIT 2 that an interrupt is present after State 0 of the L Bus State Machine 3 that the interrupt goes away after Register 9 is read A read of Register 9 will clear the current interrupts 4 that the correct port data is passed through the FIFO and 5 that an indication is received when the FIFO is...

Page 97: ...mpleted a report is printed that indicates which ports passed and which ports failed Test 21 PCC SELF TEST Performs a self test on one port and checks the results returned from that port s PCe It checks 1 that an interrupt is received 2 that it is the correct interrupt 3 that the interrupt came from the correct port 4 that the correct number of bytes were transferred and 5 that the results of self...

Page 98: ...ignals for port 7 of the TIC For each pattern to be tested a control program is created and sent to the PCc This control program consists of a Set Port Protocol control order followed by a Set Modem Controls control order followed by a Perform I O control order The pattern to be looped back is placed in the output field of the Set Modem Controls order These outputs will be looped back to the input...

Page 99: ...m the previous operation The last step is to try to find individual ports that have not interrupted in a long period of time This is done by maintaining a timer for each port The timers for all ports are decremented each time any port interrupts If the timer for a port reaches zero an error is reported on that port ...

Page 100: ...or e g incorrect register contents 3 the functional block of circuitry that failed and 4 an error number that indexes the possible failed component s EXAMPLE Lynx bus logic not in state 000 after INIT Current State is 001 LBus State Machine Reset Logic failure Error number 22 Lynx Bus Sequencing test failed If an error occurs during execution of the TICDIAG a ld it is not an error trapped by the T...

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Page 102: ...HP 3000 Series 37 PERIPHERAL INTERFACE CONTROLLER Part No 30457 90005 E0984 fi J K 8010 Foothills Blvd Roseville CA 95678 Diagnostic Manual Printed in U S A 09 84 ...

Page 103: ... incidental or consequenti J damages in connection with the furnishing performance or use of this material Hewlett Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett Packard This document contains proprietary information which is protected by copyright All rights are reserved No part of this document may be photocopied reprodu...

Page 104: ...al and replacement pages to be merged into the manual by the customer The dates on the title page change only when a new edition or a new update is published No information is incorporated into a reprinting unless it appears as a prior update the edition does not change when an update is incorporated First Edition SEP 1984 SEP 84 iii ...

Page 105: ... in the manual To verify that your manual contains the most current information check the dates printed at the bottom of each page with those listed below The date on the bottom of each page reflects the edition or subsequent update in which that page was printed SEP 84 iv Effective Pages Date all SEP 1984 ...

Page 106: ... 2 1 Test Selection 2 1 2 2 Looping 2 2 2 3 Error Handling 2 2 2 4 Printing Messages 2 3 2 5 How to Run PICDIAG 2 3 2 6 How to Configure PICDIAG 2 5 Section 3 TEST DESCRIPTIONS 3 0 Introduction 3 1 3 1 Register Test 3 1 3 2 IRQTest 3 3 3 3 Configuration Test 3 3 3 4 ABI Chip Verification 3 4 ABI Test Limitations 3 5 3 5 DMA State Machine Test 3 5 3 6 CSRQ Test 3 7 3 7 HP IB Interface Drivers Test ...

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Page 108: ... is written in SPL II and runs under DUS 1 1 REQUIRED HARDWARE The hardware required to run the PICDIAG is the HP 3000 Series 37 minimum configuration Console connected to the TIC at slot 1 port 0 HP IB Tape Drive SPU with the following board set CPU Memory 1 2 REQUIRED SOFTWARE TIC in slot 1 PIC as a coldload path a second PIC The most recent revision of the following software is required DUS 1 3...

Page 109: ...a second PIC Printed Circuit Assembly PCA in order to fully test the HP IB circuitry and the non controller functions of the ABI chip If you have only one PIC PCA you can only run test steps 1 through 40 Test steps 41 through 45 require a second PIC PCA SEP 84 1 2 ...

Page 110: ...d to list which tests and commands are currently selected When the PICDIAG is in the default configuration the STATE command will display the following message PICDIAG STATUS PATH X X CHANNEL X X EEPR ON EEPS ON ENPR ON LOOP OFF PRINT OFF TRACE OFF Sections Selected 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 25 28 29 30 32 33 34 35 36 37 39 41 42 43 44 45 To change the test select...

Page 111: ...annel number is repeated until you enter a valid response 2 Test Failure Error Messages Displayed when the PICDlAG detects a malfunction of the PIC PCA The purpose of this type of error message is a to let YDU know that the PIC under test is NOT functioning correctly and b to identify the failure The test failure error message has three parts The first part identifies the step number that detects ...

Page 112: ...ter 2 5 HOW TO RUN PICDIAG Input to the PICDIAG is through the system console Run PICDIAG in the following manner 1 Perform MPE shutdown to log off all users if applicable 2 Run the console selftest 3 Fully reset the console 4 Install a DUS tape in the coldload device 5 If the system is off power it on by turning the keyswitch to the LOCAL or REMOTE position If the system is already on verify that...

Page 113: ...ution of the diagnostic at the beginning CNTRL Y Interrupts execution of DUS During the execution of a test this command brings the PICDIAG back to the prompt Entering GO will resume the program from the point where you interrupted it 10 When you enter GO the following prompt will be displayed The PATH number 0 2 of the PIC to be tested is Enter the correct path number You then receive the followi...

Page 114: ...S ENPR AfT GO LOOP NOLOOP NOTRACE PRINTER RST RUN SEPS SNPR STATE TEST TRACE default Table 2 1 DIAGNOSTIC COMMANDS PARAMETERS DESCRIPTION Enable Error Messages Enable Error Pause Enable non error messages Return to DUS Resume diagnostic execution Loop on selected steps Stop Loop Suppress I O trace Display errors on printer Enable pauses and messages also suppress printer Restart diagnostic executi...

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Page 116: ...address read with the OBSI SIMB command Tests an additional portion of the command decoder c The channel address read with the OBn SIMB command Step 3 Register Initialization Test Verifies that PIC registers 8 II 12 13 14 and IS are correctly read after issuing an INIT channel SIMB command Only the non ABI registers are tested at this point because the data and control paths to them are simpler th...

Page 117: ...layed Error in Step 4 Latch buffer error bit a 4 8 12 v v v v R8 0000 0000 R9 0000 1110 0000 0000 Rl0 0000 0000 0000 0000 3 Register select line errors When one register fails the register test the following error message is displayed Error in Step 4 Select line errors bit a 4 8 12 v v v v R8 0000 0000 R9 1111 1111 1111 1111 Rl0 0000 0000 0000 0000 4 Handshake or write enable errors If all registe...

Page 118: ... SIMB IPOLL command functions IPOLL uses circuitry shared with ROCL SPOLL IPOLL and RMSKL The shared circuitry is tested at all channel addresses in the Channel Address Test section Step 10 SIMB Interrupt Request Test Verifies that the 51MB IRQ line functions 3 3 CONFIGURATION TEST This section of the PICDIAG tests the correct operation of the PIC s Configuration Register bits Step 11 Configuratio...

Page 119: ...ed and the diagnostic is terminated Step 15 ABI Register Initialization Test Verifies that the ABI registers are correctly initialized following an SIMB INIT channel command Step 16 Data Paths and Register Addressability Test Performs a memory test of ABI storage registers by using a random data pattern The error messages separate errors into three categorif s o PIC or ABI data line failure PIC or...

Page 120: ...t tested in the DMA State Machine test section 3 5 DMA STATE MACHINE TEST This test section verifies the correct operation of the Direct Memory Address DMA state machine Parts of it use the diagnostic DMA clocking feature by utilizing the PIC s diagnostic hardware This test section verifies The clocking and initialization of the DMA state machine All transitions of the DMA state machine including ...

Page 121: ...tates 23 and 25 That a data transfer can be aborted at states 21 and 27 Step 21 DMA State Outputs Test Verifies the outputs or the effects of the outputs for each state For the address and count register tests a random number sequence is used to test different combinations of starting address and count then the DMA is run to completion and the final count and address are verified Step 22 DMA Input...

Page 122: ...ctly pack data bytes into words Step 32 DMA Timeout Test Verifies that the DMA timeout abort functions correctly 3 6 CSRQ TEST This test section verifies the correct operation of the channel request logic Step 33 Device Request Test Verifies that DEVRQ is correctly asserted from each of the following inputs Parallel Poll New Status CSRQDIS DMINACT CIC RIOC OBSI Step 34 Channel Request Test Verifie...

Page 123: ...s point that the PIC and the ABI have been completely tested offline A second PIC is required to perform this test section The second PIC is assumed to be functioning correctly although some diagnostics are performed on it to avoid catastrophic failures The two PICs are connected together via HP IB cables with no other HP IB devices connected Since some of the HP IB lines can only be asserted by t...

Page 124: ...Step 42 Data Lines Test Data line verification with parallel poll response Tests passive low assertion of data lines ATN and EOI ATN or EOI high assertion test Tests whether ATN EOI or both can be asserted high Step 43 Handshake Lines Test Tests the HP IB handshake lines DAV NRFD and NDAC These lines can be individually tested to a limited extent Also tests REN ATN and EOI o NRFD and NDAC passive ...

Page 125: ...formed on it to avoid catastrophic failures The two PICs are connected together via HP IB cables with no other HP IB devices connected Since some of the HP IB lines can only be asserted by the system controller it is necessary for the PICDIAG to alternate the System Controller function between the two PICs This test is broken down into three groups so that failures can be easily pinpointed Step 45...