Publication No. HRMCP9 Rev. B
Function Blocks 53
7 •
Function Blocks
This section gives a brief overview of the software interfaces of onboard devices on
the CR9 CompactPCI Single Board Computer.
7.1 Processor
The Intel Pentium M processor family provides high performance with low power
and features Enhanced Intel SpeedStep
®
technology which provides the ability to
dynamically adjust the power and performance of the processor based on CPU
demand. This results in optimal performance without compromising the power
performance of the CR9.
The processor die is thermally protected by two thermal monitor features. When
reaching a maximum safe operating temperature the Thermal Control Circuit in the
processor activates a throttling feature and reduces the voltage and frequency
dynamically. If this feature is active the CR9 will indicate it with short clicks at the
speaker. In case of a catastrophic die overheating (above 125 °C) the CR9 switches off
the processor core voltage. Recovery from this catastrophic event can be done with a
power off-on cycle only.
7.2 Memory Controller
The memory controller in the CR9 supports double data rate synchronous DRAM
(DDR SDRAM) with a data bus width of 64 bits + ECC. One, two, or four banks are
provided by the CR9 with a size of either 256 MByte or 512 MByte. This results in a
minimum memory size of 256 MByte and a maximum size of 2 GByte.
7.3 DMA Controller
In standard AT compatible PCs, as well as on the CR9, the two DMA controllers
integrated on the board are internally cascaded. Both controllers are compatible with
the Intel 8237A. The DMA Controller 1 (DMAC1) is used for byte-wide transfers
while the DMAC2 is used for word-wide transfers.
7.4 Interrupt Controller
The Interrupt controller on a standard PC consists of two 82C59A devices with eight
interrupt request lines each. The two controllers are cascaded so that 14 external and
two internal interrupt sources are available. The master interrupt controller provides
IRQ [7...1], the slave interrupt controller provides IRQ [15...8]. IRQ2 is used to
cascade the two controllers, IRQ0 is used as a system timer interrupt and is tied to
interval timer 1, counter 0. The remaining 14 interrupt lines are mapped to various
onboard devices. Each 82C59A provides several internal registers. The interrupts at
