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Appendix
Appendix E: Watchdog Timer (WDT) Setting
WDT is widely applied to industry computers to monitor activities of CPU. The
programmed application triggers WDT with adequate timer setting depending
on its requirement. Before WDT counts down to zero, the functional system
will reset the counter. In case the WDT counter is not reset by an abnormal
system, it will counts down to zero and then reset the system automatically.
This computer supports the watchdog timer up to 255 levels for users for
software programming. Below please take the source code written in C for a
WDT application example.
/*----- Include Header Area -----*/
#include "math.h"
#include "stdio.h"
#include "dos.h"
/**-------- index port 0x2e ---------*/
void main()
{
outportb(0x2e, 0x87); /* initial IO port */
outportb(0x2e, 0x87); /* twice, */
outportb(0x2e, 0x07); /* point to logical device */
outportb(0x2e+1, 0x07); /* select logical device 7 */
outportb(0x2e, 0xf5); /* select offset f5h */
outportb(0x2e+1, 0x40); /* set bit5 = 1 to clear bit5 */
outportb(0x2e, 0xf0); /* select offset f0h */
outportb(0x2e+1, 0x81); /* set bit7 =1 to enable WDTRST# */
outportb(0x2e, 0xf6); /* select offset f6h */
outportb(0x2e+1, 0x05); /* update offset f6h to 0ah :10sec */
outportb(0x2e, 0xF5); /* select offset f5h */
outportb(0x2e+1, 0x20); /* set bit5 = 1 enable watch dog time */
outportb(0x2e, 0xAA); /* stop program F71869E, Exit */
}
Summary of Contents for FPC-7500 Series
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