DMA Timers (DTIM0–DTIM3)
24-2
Freescale Semiconductor
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
is a block diagram of one of the four identical timer modules.
Figure 24-1. DMA Timer Block Diagram
24.1.2
Features
Each DMA timer module has:
•
Maximum timeout period of 293,203 seconds at 60 MHz (~81 hours)
•
17-ns resolution at 60 MHz
•
Programmable sources for the clock input, including external clock
•
Programmable prescaler
•
Input-capture capability with programmable trigger edge on input pin
•
Programmable mode for the output pin on reference compare
•
Free run and restart modes
•
Programmable interrupt or DMA request on input capture or reference-compare
•
Ability to stop the timer from counting when the ColdFire core is halted
DMA Timer
Divider
DMA Timer Mode Register (DTMRn)
Prescaler
Mode Bits
DMA Timer Counter Register (DTCNn)
31
0
DMA Timer Reference Register (DTRRn)
31
0
DMA Timer Capture Register (DTCRn)
31
0
DMA Timer Event Register (DTERn)
Capture
Detection
clock
(contains incrementing value)
(reference value for comparison with DTCN)
(indicates capture or when DTCN = DTRRn)
Interrupt Request
Clock
Generator
DMA Timer Extended Mode
Register (DTXMRn)
DMA Request
0
0
15
7
7
0
Internal Bus Clock
(f
sys
)
DMA Timer
Internal Bus to/from DMA Timer Registers
(latches DTCN value when triggered by
DTINn)
DTOUTn
DTINn
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
