Debug Module
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
31-37
Command Sequence:
Figure 31-40.
RDMREG
Command Sequence
Operand Data:
None
Result Data:
The contents of the selected debug register are returned as a longword value. The
data is returned most-significant word first.
31.4.1.5.15
Write Debug Module Register (
WDMREG
)
The operand (longword) data is written to the specified debug module register. All 32 bits of the register
are altered by the write. DSCLK must be inactive while the debug module register writes from the CPU
accesses are performed using the WDEBUG instruction.
Command Format:
shows the definition of the DRc write encoding.
Command Sequence:
Figure 31-42.
WDMREG
Command Sequence
Operand Data:
Longword data is written into the specified debug register. The data is supplied
most-significant word first.
Result Data:
Command complete status (0xFFFF) is returned when register write is complete.
Figure 31-41.
WDMREG
BDM Command Format
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x2
0xC
1
0
DRc
D[31:16]
D[15:0]
RDMREG
???
XXX
MS RESULT
NEXT CMD
LS RESULT
XXX
’ILLEGAL’
NEXT CMD
’NOT READY’
WDMREG
???
MS DATA
’NOT READY’
LS DATA
’NOT READY’
XXX
’ILLEGAL’
NEXT CMD
’NOT READY’
NEXT CMD
’CMD COMPLETE’
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
