Periodic Interrupt Timer and Real Time Interrupt (PIT_RTI)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
28-9
Preliminary
28.4
Functional Description
This section gives detailed information about the internal operation of the module. The PIT block has nine
timers: one RTI timer and eight additional timers for general-purpose use (e.g. DMA triggering, eQADC
triggering).
28.4.1
Timer / RTI
The timers generate triggers at periodic intervals, when enabled. They load their start values, as specified
in their TLVAL registers, then count down until they reach 0. This creates a trigger, then they load their
respective start value again. Each time a timer reachers 0, it will generate a trigger pulse and set the
interrupt flag.
All interrupts can be enabled or masked (by setting the TIE/RTIE bits in the PITINTEN register and
selecting interrupts in the PITINTSEL register). In the case of the RTI, because clearing the interrupt
crosses clock domains, a minimum value of 32 must be maintained.
If desired, the current counter value of the timer can be read via the TVAL registers. The value of the RTI
counter can be delayed considerably, as it is synchronized to the bus clock from the RTI clock domain.
Offset: 0x0110
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
MDIS
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-8. PIT Control Registers (PITCTRL)
Table 28-9. PITCTRL Field Descriptions
Field
Description
bits 0–6
Reserved.
Note: Bit 6 is a reserved bit, but can be read and written. Writing to this bit will update the value, and
reading it will return the last value written, but this bit has no other effect.
MDIS
Module Disable. This is used to disable timers 1–8. The RTI (timer 0) is not affected by this bit. The
module should be enabled before any setup is done.
0 Clock for timers 1–8 is enabled
1 Clock for timers 1–8 is disabled (default)
bits 8–31
Reserved.
