MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
25-64
Freescale Semiconductor
25.11.15.4 Single Read Access
1. Initialize the read/write access address register (RWA) through the access method outlined in
Section 25.11.10, “ NZ6C3 Register Access via JTAG / OnCE
,” using the Nexus register index
of
0x
9 (see
). Configure as follows:
– Read Address
–>
0xnnnnnnnn (read address)
2. Initialize the read/write access control/status register (RWCS) through the access method outlined
Section 25.11.10, “ NZ6C3 Register Access via JTAG / OnCE
,” using the Nexus register
index of 0x7 (see
). Configure the bits as follows:
– Access Control RWCS[AC]
–>
0b1 (to indicate start access)
– Map Select RWCS[MAP]
–>
0b000 (primary memory map)
– Access Priority RWCS[PR]
–>
0b00 (lowest priority)
– Read/Write RWCS[RW]
–>
0b0 (read access)
– Word Size RWCS[SZ]
–>
0b0xx (32-bit, 16-bit, 8-bit)
– Access Count RWCS[CNT]
–>
0x0000 or 0x0001 (single access)
NOTE
Access Count (CNT) of 0x0000 or 0x0001 will perform a single access.
3. The NZ6C3 module will then arbitrate for the system bus and the read data will be transferred
from the system bus to the RWD register. When the transfer is completed without error
(ERR = 0), Nexus asserts the RDY pin and sets the DV bit in the RWCS register. This indicates
that the device is ready for the next access.
4. The data can then be read from the read/write access data register (RWD) through the access
Section 25.11.10, “ NZ6C3 Register Access via JTAG / OnCE
,” using the
Nexus register index of 0xA (see
NOTE
Only the RDY pin as well as the DV and ERR bits within the RWCS provide
Read/Write Access status to the external development tool.
25.11.15.5 Block Read Access (Non-Burst Mode)
1. For a non-burst block read access, follow Steps 1 and 2 outlined in
” to initialize the registers, but using a value greater than one (0x1) for the CNT field
in the RWCS register.
2. The NZ6C3 module will then arbitrate for the system bus and the read data will be transferred
from the system bus to the RWD register. When the transfer has completed without error
(ERR=0b0), the address from the RWA register is incremented to the next word size (specified in
the SZ field) and the number from the CNT field is decremented. Nexus will then assert the RDY
pin. This indicates that the device is ready for the next access.
3. The data can then be read from the read/write access data register (RWD) through the access
Section 25.11.10, “ NZ6C3 Register Access via JTAG / OnCE
,” using the
Nexus register index of 0xA (see
Summary of Contents for MPC5553
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