MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor
13-15
13.3.2.4
Secondary Low-/Mid-Address Space Block Locking Register
(FLASH_SLMLR)
The FLASH_SLMLR provides an alternative means to protect blocks from being modified. These bits
along with bits in the LMLOCK field (FLASH_LMLR), determine if the block is locked from program or
erase. An OR of FLASH_LMLR and FLASH_SLMLR determine the final lock status. See
Section 13.3.2.2, “Low-/Mid-Address Space Block Locking Register (FLASH_LMLR)
” for more
information on FLASH_LMLR.
Table 13-9. FLASH_HLR Field Descriptions
Bits
Name
Description
0
HBE
High-address lock enable. Enables the locking field (HLOCK) to be set or cleared by
register writes. This bit is a status bit only, and may not be written or cleared, and the
reset value is 0. The method to set this bit is to provide a password, and if the password
matches, the HBE bit will be set to reflect the status of enabled, and is enabled until a
reset operation occurs. For HBE, the password 0xB2B2_2222 must be written to
FLASH_HLR.
0 High-address locks are disabled, and cannot be modified.
1 High-address locks are enabled to be written.
1–19
—
Reserved.
20–31
HLOCK
[11:0]
High-address space block lock. Has the same characteristics as MLOCK. See
Section 13.3.2.2, “Low-/Mid-Address Space Block Locking Register (FLASH_LMLR)
”
for more information. The block numbering for high-address space starts with
HLOCK[0] and continues until all blocks are accounted.
HLOCK is not writable unless HBE is set.
In the event that blocks are not present (due to configuration or total memory size), the
HLOCK bits will default to locked, and will not be writable.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R SLE
0
0
0
0
0
0
0
0
0
0
SSLOCK
1
1
SMLOCK
W
Reset
0
0
0
0
0
0
0
0
0
0
0
1
Reg Addr
Base (0xC3F8_8000) + 0x000C
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
1
1
1
1
1
1
1
1
1
1
SLLOCK
W
Reset
1
1
1
1
1
1
1
1
Reg Addr
Base (0xC3F8_8000) + 0x000C
1
The reset value of these bits is determined by flash values in the shadow row. An erased array will cause
the reset value to be 1
Figure 13-8. Secondary Low-/Mid-Address Space Block
Locking Register (FLASH_SLMLR)
Summary of Contents for MPC5553
Page 5: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 2 Freescale Semiconductor...
Page 21: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 xvi Freescale Semiconductor...
Page 47: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 1 26 Freescale Semiconductor...
Page 163: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 4 20 Freescale Semiconductor...
Page 179: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 5 16 Freescale Semiconductor...
Page 561: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 13 38 Freescale Semiconductor...
Page 615: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 14 54 Freescale Semiconductor...
Page 707: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 17 68 Freescale Semiconductor...
Page 755: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 18 48 Freescale Semiconductor...
Page 873: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 19 118 Freescale Semiconductor...
Page 984: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 Freescale Semiconductor 21 41...
Page 985: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 21 42 Freescale Semiconductor...
Page 1019: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 22 34 Freescale Semiconductor...
Page 1129: ...MPC5553 MPC5554 Microcontroller Reference Manual Rev 5 25 90 Freescale Semiconductor...
