Nexus Development Interface (NDI)
Freescale Semiconductor
31-75
PXR40 Microcontroller Reference Manual, Rev. 1
Reading/writing of a Nexus register then requires two (2) passes through the data-scan (DR) path of the
JTAG state machine (refer to
Chapter 32, IEEE 1149.1 Test Access Port Controller (JTAGC)
).
1. The first pass through the DR selects the Nexus register to be accessed by providing an index
(refer to
), and the direction (read/write). This is achieved by loading an 8-bit value into
the JTAG data register (DR). This register has the following format:
2. The second pass through the DR then shifts the data in or out of the JTAG port, lsb first.
a) During a read access, data is latched from the selected Nexus register when the JTAG state
machine passes through the capture-DR state.
b) During a write access, data is latched into the selected Nexus register when the JTAG state
machine passes through the update-DR state.
31.17.3 Functional Description
31.17.4 Enabling NXDM and NXFR Operation
The NXDM (and NXFR) module is enabled by loading a single instruction (ACCESS_AUX_TAP_DMA
or ACCESS_AUX_TAP_NXFR as shown in
) into the JTAG instruction register (IR), and then
loading the corresponding OnCE OCMD register with the NEXUS_ACCESS instruction (refer to
). After it is enabled, the module is ready to accept control input via the JTAG pins.
The Nexus module is disabled when the JTAG state machine reaches the test-logic-reset state. This state
can be reached by the assertion of the JCOMP pin or by cycling through the state machine using the TMS
pin. The Nexus module is also disabled if a power-on reset (POR) event occurs.
If the NXDM (and NXFR) module is disabled, no trace output is provided, and the module disables (drive
inactive) auxiliary port output pins (MDO[15:0], MSEO[1:0], MCKO). Nexus registers are not be
available for reads or writes.
Access: R/W
0
1
2
3
4
5
6
7
R
Nexus Register Index
R/W
W
Reset
Figure 31-53. JTAG DR for NEXUS Register Access
Table 31-45. DR Read/Write Encoding
Nexus Register Index
Description
Read/Write (R/W)
0 Read
1 Write
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
Page 1168: ...Decimation Filter 28 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
