PCI-82x Series Cards
Multifunction Boards
User Manual, Ver. 1.5, Jan. 2017, PMH-024-15, Page: 50
6.5.2
Write the AI Software Trigger
(Write)wBase+0x04
Write the AI Software Trigger
This register is used to trigger the A/D Conversion and then save the data to the FIFO buffer.
6.5.3
Read the FIFO Data
(Read)wBase+0x04
Read the FIFO Data
This register is used to read Analog Input Data from the FIFO buffer.
6.5.4
Read/Write AI Pacer Sampling Rate
(Read/Write)wBase+0x8
Read/Write the AI Pacer Sampling Rate
Bit
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
Data
CF
CE
CD
CC
CB
CA
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
This register is used to set the internal pacer clock and then start the Analog Input in Pacer Trigger
mode. The base frequency is set using the register offset 14H.The default clock value is 20 MHz.
The Sampling Rate = Base Frequency / Data
The following is an example of how to enable the Analog Output Channel:
outpw(wBase+0x14,0x0001);
//Sets the Base frequency to 8 MHz
outpw(wBase+0x8,800);
//Pacer Clock = 8 MHz / 800 = 10 KHz
