MAX32600 User’s Guide
System Configuration and Management
4.1 Power Ecosystem and Operating Modes
• If the wakeup event was a GPIO event, do one of the following to clear the GPIO WUD:
1. If desired action is to clear
all
GPIO WUD latches:
• Clear all GPIO flags by writing 1 to
to clear all GPIO WUD setups
• Take all pads out of the low power state by setting the
register to 1
• Deassert GPIO Freeze by setting
to 0
• Clear all flags in
register
2. If desired action is to clear
individual
GPIO WUD latches that initiated the wakeup event:
• Set WUD Pad Select for the individual port in the
register
• Set WUD Pad Signal Mode by writing 2 to
• Set WUD Pulse 0 register,
, to 1. This register self-clears.
• Take all pads out of the low power state by setting the
register to 1
• Deassert GPIO Freeze by setting
to 0
• Clear all flags in
register
LP1 Wakeup
• Read
register to determine the source of the wakeup event
• If the wakeup event was a GPIO event, it is recommended that GPIO flags are cleared individually. Clearing of
all
GPIO WUD latches is not recommended
when waking up from LP1.
–
Set WUD Pad Select for the individual port in the
register
–
Set WUD Pad Signal Mode by writing 2 to
–
Set WUD Pulse 0 register,
, to 1. This register self-clears.
–
Take all pads out of the low power state by setting the
register to 1
–
Deassert GPIO Freeze by setting
to 0
–
Clear all flags in
register
4.1.3
Low Power Modes (LP2: PMU and LP3: RUN)
The
Peripheral Management Unit (PMU)
is in control of the system when using LP2: PMU. During LP3: RUN, the ARM core is in control of the system. A System
Management unit controls entering and exiting both modes.
When operating in either mode, firmware is in control of the power used by the system. Firmware controls clock gating, peripheral enables, and the
(AFE).
Rev.1.3 April 2015
Maxim Integrated
Page 34
