3.6
BTR (16-bit Data Specified Bit Reset)
3-11
3.6 BTR (16-bit Data Specified Bit Reset)
Instruction format
DT1
U7
D
n
R0
BTR.US
i
Operation unit (
●
: Available)
Operation unit
bit
US
SS
UL
SL
SF
DF
i
●
List of operands
Operand
Description
D
Device address of target data
n
Bit number (device address or constant) (Settable range: 0 to 15)
Available devices (
●
: Available)
Operand
16-bit device
32-bit device
Integer
Real
number
String
Index
modifier
*1
WX WY WR WL WS SD DT LD
UM
WI
WO
TS
CS
TE
CE
IX
K
U
H
SF DF
" "
D
●
●
●
●
●
●
●
●
●
n
●
●
●
●
●
●
●
●
●
●
●
●
*1
:
Only 16-bit deivces, 32-bit devices, and integer constants can be modified. (Real number constants and character
constants cannot be specified.)
Outline of operation
Turns OFF (0) the [n]th bit in the area specified by [D] according to the operation unit of [i].
Other bits except the bit specified by [D] do not change.
Specify [n] within the range of U0 to U15.
Processing
Example 1) Specifying a constant for the bit number
D: DT0, n: U4
Bit
F E D C B A 9 8 7 6 5 4 3 2 1 0
DT0
0 1 0 1 1 0 0 0 0 1 1
1
0 0 0 0
Bit
F E D C B A 9 8 7 6 5 4 3 2 1 0
DT0
0 1 0 1 1 0 0 0 0 1 1
0
0 0 0 0
Summary of Contents for FP7 Series
Page 1: ...FP7 CPU Unit Ver 4 20 Additional Functions Manual 12 21 2015...
Page 3: ...1 Introduction of Ver 4 20...
Page 6: ......
Page 7: ...2 Basic Instructions...
Page 17: ...3 High level Instructions...
Page 29: ...4 FP2 FP2SH Program Conversion Function...
Page 36: ......
Page 37: ...5 MEWTOCOL COM...