OP7100
28 Hardware
watchdog timer is
hitwd
. To hold the watchdog timer at bay, make a call to
hitwd
in a routine that runs periodically at the lowest software priority level.
A program can read the state of the
WDO
line with a call to
wderror
. This
makes it possible to determine whether a watchdog timeout occurred. The
following sample program shows how to do this when a program starts or
restarts.
main(){
if( wderror() ) wd_cleanup();
hitwd();
...
}
Power Shutdown and Reset
When VCC (+5 V) drops below V
MIN
(between 4.5 V and 4.75 V), the
ADM691 supervisor asserts
/RESET
and holds it until VCC goes above
V
MIN
and stays that way for at least 50 ms. This delay allows the system’s
devices to power up and stabilize before the CPU starts.
PFI “Early Warning”
When
PFI
drops below 1.3 V ± 0.05 V (i.e., DCIN drops below ~10 V),
the supervisor asserts
/NMI
(nonmaskable interrupt), and allows the
program to clean up and get ready for shutdown. The underlying assump-
tion here is that
PFI
will cause the interrupt during a power failure before
the ADM691 asserts
/RESET
.
In order to improve the performance of the power-failure interrupt circuit,
we have added some hysteresis to the power-failure comparator by adding
a resistor, R34, between the comparator input and output pins. R34 can be
found on the 175-0196 and the 175-0211 versions of the OP7100. The
hysteresis prevents the comparator from switching rapidly—and therefore
generating multiple interrupts—when the input voltage is falling slowly.
Once the comparator switches (DC IN falls to approximately 8.5 V), this
feedback holds the input (PFI) low and prevents further interrupts from
being generated. At this point, the 5 V regulator still has sufficient voltage to
keep the processor operating, so that an interrupt service routine can
perform shutdown tasks and “tidying up” before the Vcc line fails. The
comparator will not turn the output (PFO) high until DC IN has risen to
about 9.2 V. The hysteresis will also help prevent any system oscillation in
adverse power supply/loading situations.
The voltage at which the power-failure interrupt occurs may be changed by
adjusting the values of R29 and R30, which are shown in Figure 3-3. To
calculate the values of these components, let V
L
be the voltage at which
PFO turns off as DC IN falls, and let V
H
be the voltage at which PFO turns
on as DC IN rises.
Summary of Contents for OP7100
Page 1: ...OP7100 Serial Graphic Display User s Manual 019 0065 070831 O ...
Page 10: ...OP7100 x About This Manual ...
Page 16: ...OP7100 16 Overview ...
Page 74: ...OP7100 74 Software ...
Page 82: ...OP7100 82 Graphics Programming ...
Page 88: ...OP7100 88 Installation ...
Page 98: ...OP7100 98 Specifications ...
Page 108: ...OP7100 108 Memory I O Map and Interrupt Vectors ...
Page 112: ...112 Serial Interface Board 2 OP7100 ...
Page 113: ...OP7100 Backup Battery 113 APPENDIX E BACKUP BATTERY ...
Page 116: ...OP7100 116 Backup Battery ...
Page 124: ...OP7100 124 Index ...
Page 126: ...XX0000 Schematics ...