Copyright
c
2016, SiFive Inc. All rights reserved.
21
Index
Value
Meaning
0
0x0f0
Assert
corerst
1
0x1f0
Assert
hfclkrst
2
0x1d0
Deassert
vddpaden
3
0x1c0
Deassert
Reserved
4-7
0x1c0
Repeats
Table 6.2: Default PMU sleep program.
Wakeup Signal Conditioning
The PMU can be woken by external signals,
dwakeup
and
awakeup
, which are preconditioned by
the signal conditioning block.
Currently, the
dwakeup
signal has a fixed deglitch circuit that requires the
dwakeup
signal remain
asserted for two AON clock edges before being accepted. The conditioning circuit also resynchro-
nizes the
dwakeup
signal to the AON
lfclk
.
The
awakeup
analog intput is not yet supported on E300 systems.
PMU Interrupt Enables (
pmuie
) and Wakeup Cause (
pmucause
)
The
pmuie
register indicates which events can wake the MOFF block from sleep. The
awakeup
bit
indicates that the
awakeup
pin can rouse MOFF. The
dwakeup
bit indicates that a logic 0 on the
dwakeup n
pin can rouse MOFF. The
rtc
bit indicates that the RTC comparator can rouse MOFF.
R
eserve
d
31
4
awakeup
3
dwakeup
2
rtc
1
R
eserve
d
0
Figure 6.3: Format of
pmuie
register.
Following a wakeup, the
pmucause
register indicates which event caused the wakeup. The value
in the
wakeupcause
field corresponds to the bit position of the event in
pmuie
, e.g., a value of 2
indicates
dwakeup
. The value 0 indicates a wakeup from reset.
R
es
erve
d
31
10
resetcause
9
8
R
es
er
ve
d
7
2
wakeupcause
1
0
Figure 6.4: Format of
pmucause
register.
In the event of a wakeup from reset, the
resetcause
field indicates which reset source triggered
the wakeup. Table 6.3 lists the values the
resetcause
field may take. The value in
resetcause
persists until the next reset.
Summary of Contents for E300
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