Apollo Carrier Board
User Manual
45
www.terasic.com
September 22, 2020
The base address of BUTTON and LED controllers are 0x4000010 and 0x4000020 based on
PCIE_BAR4, respectively. The on-chip memory base address is 0x00000000 relative to the DMA
controller.
The above definitions are the same as those in the PCIe Fundamental demo.
Before accessing the FPGA through PCI Express, the application first calls PCIE_Load to
dynamically load the TERASIC_PCIE_AVMM.DLL. Then, it calls PCIE_Open to open the PCI
Express driver. The constant DEFAULT_PCIE_VID and DEFAULT_PCIE_DID used in the
PCIE_Open are defined in TERASIC_PCIE_AVMM.h. If developers change the Vendor ID and
Device ID and PCI Express IP, they also need to change the ID value defined in
TERASIC_PCIE_AVMM.h. If the return value of PCIE_Open is zero, it means the driver cannot be
accessed successfully. In this case, please make sure:
The FPGA is configured with the associated bit-stream file and the Host is rebooted.
The PCI express driver is loaded successfully.
The LED control is implemented by calling PCIE_Write32 API, as shown below:
T
he button status query is implemented by calling the
PCIE_Read32
API, as shown below:
T
he memory-mapped memory read and write test is implemented by
PCIE_DmaWrite
and
PCIE_DmaRead
API, as shown below:
