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1.7. Error detection
The cyclic redundancy check (CRC) field occupies two bytes and
contains a 16-bit binary value. The CRC value is computed by the
transmitting device and then appended to the data frame. The
receiving device recalculates the CRC value when receiving the
data, and compares it with the value in the received CRC field. If
the two values are not equal, an error has occurred.
During CRC computing, first preset a 16-bit register to all 1s; then
calculate the 8-bit byte in the data frame continuously with the
current value of this register; only the 8 data bits of each byte are
involved in generating a CRC. The start bit, stop bit, and parity bit
that may be used do not apply to CRC.
During generating a CRC, XOR each 8-bit byte with contents in
the register, shift the result to the low bit, and supplement the
high bit with "0". Then shift out and check the least significant bit
(LSB). If the LSB is 1, this register will perform an exclusive OR
operation with a preset fixed value. If 0, then no action will be
taken.
Repeat the above process until eight shift operations are per-
formed. When the last bit (the 8th bit) is shifted, XOR the next
8-bit byte with the current value of the register. Perform another
eight shift XOR operations described above. When all the bytes
in the data frame are processed, the final value generated is the
CRC value.
To generate a CRC, follow below steps:
(1) Preset a 16-bit register as 0FFFFH (all 1s), called CRC register;
(2) Perform an XOR computing of the first 8-bit byte in the data
frame with the low byte in the CRC register, and store the
result in the CRC register;
(3) Shift the CRC register one bit to the right, fill the most sig-
nificant bit (MSB) with 0, shift out the least significant bit and
check;
(4) If the LSB is 0: repeat the third step (perform next shift);
If the LSB is 1: perform an XOR computing of the CRC register
with a preset fixed value (0A001H);
(5) Repeat Step 3 and 4 until eight shifts are performed. In this
way, eight bits will be processed completely;
(6) Repeat Step 2 to Step 5 to process the next eight bits until all
bytes are processed;
(7) The final value generated in the CRC register is the CRC value.
2. Communication connection
2.1. Mailing address
The communication address can be set from 0 to 255. After the
address is set, the controller will only receive and respond to the
request for the set address. After the controller changes the com-
munication address during operation, it will receive and respond
with the new address.
2.2. Communication baud rate
The communication baud rate can be set to 9600BPS, 19200BPS,
38400BPS, 115200BPS. After the baud rate is set, the controller
will always receive and respond with its set baud rate. After the
controller changes the baud rate during operation, it will receive
and respond at the new baud rate.
2.3. Link dead operation
Link dead execution mode can be set to alarm or ignore; link
timeout time can be set to 2~200S, with 1s step; if the controller
does not receive a valid data frame within the set scan period, it
will consider the link dead and execute corresponding link dead
operation.
2.4. Total device information count
The controller receives the accumulated count of valid data
frames, starting from powering on or the last counter reset.
2.5. CRC check error count
The controller will accumulate the CRC error count if it receives
the check code error’s data frame.
2.6. Error response count
The controller will accumulate the error message response count
if it receives the error message’s data frame.
Instruction Leafl et
Effective September 2022
IZM6 Series Air Circuit Breaker
Operating Instruction Leafl et
