Appendix B - DIO Interface
Issue A
113
Appendix B - DIO Interface
The DIO connector on the ALUDRA is interfaced to GPIO ports on the ITE IT8718F
Super I/O chipset. The DIO has both 4-bit digital inputs and 4-bit digital outputs. The
digital inputs and digital outputs are generally control signals that control the on/off circuit
of external devices or TTL devices. Data can be read or written to the selected address to
enable the DIO functions.
For further information, please refer to the datasheet for the Winbond
W83697HG Super I/O chipset.
DIO Connector Pinouts
The following table describes how the DIO connector pins are connected to the Super I/O
GPIO port.
Pin Description Super
I/O
Pin Super
I/O
Pin
Description
1 GND
NA
NA
2 VCC
NA
NA
3
Output 3
GP23
General Purpose I/O Port 2 Bit 3
4
Output 2
GP22
General Purpose I/O Port 2 Bit 2
5
Output 1
GP21
General Purpose I/O Port 2 Bit 1
6
Output 0
GP20
General Purpose I/O Port 2 Bit 0
7
Input 3
GP33
General Purpose I/O 33
8
Input 2
GP32
General Purpose I/O 32
9
Input 1
GP31
General Purpose I/O 31
10
Input 0
GP30
General Purpose I/O 30
Assembly Language Samples
Enable the DIO Input Function
The BIOS interrupt call INT 15H controls the digital I/O. An assembly program to enable
digital I/O input functions is listed below.
MOV
AX, 6F08H
Sets the digital port as input
INT
15H
Initiates the INT 15H BIOS call
Enable the DIO Output Function
The BIOS interrupt call INT 15H controls the digital I/O. An assembly program to enable
digital I/O output functions is listed below.
MOV
AX, 6F09H
Sets the digital port as output
MOV BL,
09H
INT
15H
Initiates the INT 15H BIOS call
Summary of Contents for ALUDRA
Page 116: ...ALUDRA user manual Issue A 116 Appendix D Address Mapping I O Address Map ...
Page 117: ...Appendix D Address Mapping Issue A 117 Table IO Address Map ...
Page 118: ...ALUDRA user manual Issue A 118 IRQ Address Map Table IRQ Address Map ...
Page 119: ...Appendix D Address Mapping Issue A 119 Memory Address Map Table Memory Address Map ...
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