i.MX51 EVK Linux Reference Manual
Freescale Semiconductor
27-1
Chapter 27
MMC/SD/SDIO Host Driver
The MultiMediaCard (MMC)/ Secure Digital (SD)/ Secure Digital Input Output (SDIO) Host driver
implements a standard Linux driver interface to the enhanced MMC/SD host controller (eSDHC). The host
driver is part of the Linux kernel MMC framework.
The MMC driver has the following features:
•
1-bit or 4-bit operation for SD and SDIO cards
•
Supports card insertion and removal detections
•
Supports the standard MMC commands
•
PIO and DMA data transfers
•
Power management
•
Supports 1/4/8-bit operations for MMC cards
27.1
Hardware Operation
The MMC communication is based on an advanced 11-pin serial bus designed to operate in a low voltage
range. The eSDHC module support MMC along with SD memory and I/O functions. The eSDHC controls
the MMC, SD memory, and I/O cards by sending commands to cards and performing data accesses to and
from the cards. The SD memory card system defines two alternative communication protocols: SD and
SPI. The eSDHC only support the SD bus protocol.
The eSDHC command transfer type and eSDHC command argument registers allow a command to be
issued to the card. The eSDHC command, system control and protocol control registers allow the users to
specify the format of the data and response and to control the read wait cycle.
The block length register defines the number of bytes in a block (block size). As the Stream mode of MMC
is not supported, the block length must be set for every transfer.
There are four 32-bit registers used to store the response from the card in the eSDHC. The eSDHC reads
these four registers to get the command response directly. The eSDHC uses a fully configurable
128
×
32-bit FIFO for read and write. The buffer is used as temporary storage for data being transferred
between the host system and the card, and vice versa. The eSDHC data buffer access register bits hold
32-bit data upon a read or write transfer.
For receiving data, the steps are as follows:
1. The eSDHC controller generates a DMA request when there are more words received in the buffer
than the amount set in the RD_WML register
2. Upon receiving this request, DMA engine starts transferring data from the eSDHC FIFO to system
memory by reading the data buffer access register
Summary of Contents for i.MX51 EVK
Page 1: ...Part Number 924 76374 Rev 10 11 01 11 2010 i MX51 EVK Linux Reference Manual...
Page 14: ...i MX51 EVK Linux Reference Manual xiv Freescale Semiconductor...
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Page 24: ...i MX51 EVK Linux Reference Manual xxiv Freescale Semiconductor...
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