Chip Configuration Module (CCM)
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
12-3
12.3.2
Memory Map
NOTE
To safeguard against unintentionally activating test logic, write 0x0000 to
the above reserved location during initialization (immediately after reset) to
lock out test features. Setting any bits in the CCR may lead to unpredictable
results.
12.3.3
Register Descriptions
The following section describes the CCM registers.
12.3.3.1
Chip Configuration Register (CCR)
Table 12-3. Chip Configuration Module Memory Map
IPSBAR
Offset
1
1
Addresses not assigned to a register and undefined register bits are reserved for expansion.
Register
Width
(bits)
Access
Reset Value
Section/Page
Supervisor Mode Access Only
0x11_0004
Chip Configuration Register (CCR)
16
R
0x0001
0x11_0007
Low-Power Control Register (LPCR)
2
2
See
Chapter 9, “Power Management,”
for a description of the LPCR. It is shown here only to warn against accidental writes to
this register.
8
R/W
0x00
0x11_0008
Reset Configuration Register (RCON)
16
R
0x0000
0x11_000A
Chip Identification Register (CIR)
16
R
0x2000
0x11_0010
Unimplemented
3
3
Accessing an unimplemented address has no effect and causes a cycle termination transfer error.
—
IPSBAR
Offset:
0x11_0004 (CCR)
Access: Supervisor read-only
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
SZEN PSTEN
0
BME
BMT
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Figure 12-2. Chip Configuration Register (CCR)
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
