Interrupt Controller Module
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
15-6
15.3.1
Interrupt Pending Registers (IPRHn, IPRLn)
The IPRH
n
and IPRL
n
registers,
, each 32 bits, provide a bit map for each
interrupt request to indicate if there is an active request (1 = active request, 0 = no request) for the given
source. The state of the interrupt mask register does not affect the IPR
n
. The IPR
n
is cleared by reset. The
IPR
n
is a read-only register, so any attempted write to this register is ignored. Bit 0 is not implemented and
reads as a zero.
IPSBAR
Offset:
0x00_0C00 (IPRH0)
0x00_0D00 (IPRH1)
Access: User read-only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
INT[63:32]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 15-1. Interrupt Pending Register High (IPRHn)
Table 15-4. IPRHn Field Descriptions
Field
Description
31–0
INT
Interrupt pending. Each bit corresponds to an interrupt source. The corresponding IMRHn bit determines whether an
interrupt condition can generate an interrupt. At every system clock, the IPRHn samples the signal generated by the
interrupting source. The corresponding IPRHn bit reflects the state of the interrupt signal even if the corresponding
IMRHn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
IPSBAR
Offset:
0x00_0C04 (IPRL0)
0x00_0D04 (IPRL1)
Access: User read-only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
INT[31:1]
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 15-2. Interrupt Pending Register Low (IPRLn)
Table 15-5. IPRLn Field Descriptions
Field
Description
31–1
INT
Interrupt Pending. Each bit corresponds to an interrupt source. The corresponding IMRLn bit determines whether an
interrupt condition can generate an interrupt. At every system clock, the IPRLn samples the signal generated by the
interrupting source. The corresponding IPRLn bit reflects the state of the interrupt signal even if the corresponding
IMRLn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
0
Reserved, must be cleared.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
