FlexCAN
Freescale Semiconductor
30-8
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
30.3.2
FlexCAN Control Register (CANCTRL)
CANCTRL is defined for specific FlexCAN control features related to the CAN bus, such as bit-rate,
programmable sampling point within an Rx bit, loop back mode, listen-only mode, bus off recovery
behavior, and interrupt enabling. It also determines the division factor for the clock prescaler. Most of the
fields in this register should only be changed while the module is disabled or in freeze mode. Exceptions
are the BOFFMSK, ERRMSK, and BOFFREC bits, which can be accessed at any time.
IPSBAR
Offset:
0x1C_0004 (CANCTRL)
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
PRESDIV
RJW
PSEG1
PSEG2
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R BOFF
MSK
ERR
MSK
CLK_
SRC
LPB
0
0
0
0
SMP
BOFF
REC
TSYN LBUF LOM
PROPSEG
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 30-5. FlexCAN Control Register (CANCTRL)
Table 30-3. CANCTRL Field Descriptions
Field
Description
31–24
PRESDIV
Prescaler division factor. Defines the ratio between the clock source frequency (set by CLK_SRC bit) and the serial
clock (S clock) frequency. The S clock period defines the time quantum of the CAN protocol. For the reset value,
the S clock frequency is equal to the clock source frequency. The maximum value of this register is 0xFF, that gives
a minimum S clock frequency equal to the clock source frequency divided by 256. For more information refer to
Section 30.3.18, “Protocol Timing
.”
Eqn. 30-1
23–22
RJW
Resynchronization jump width. Defines the maximum number of time quanta (one time quantum is equal to the S
clock period) that a bit time can be changed by one resynchronization. The valid programmable values are 0–3.
Eqn. 30-2
21–19
PSEG1
Phase buffer segment 1. Defines the length of phase buffer segment 1 in the bit time. The valid programmable
values are 0–7.
Eqn. 30-3
18–16
PSEG2
Phase buffer segment 2. Defines the length of phase buffer segment 2 in the bit time. The valid programmable
values are 1–7.
Eqn. 30-4
15
BOFFMSK
Bus off interrupt mask.
0 Bus off interrupt disabled
1 Bus off interrupt enabled
S clock frequency
fsys or EXTAL
P 1
--------------------------------------
=
Resync jump width = (RJW + 1) time quanta
Phase buffer segment 1
(PSEG1 + 1) time quanta
=
Phase buffer segment 2
(PSEG2 + 1) time quanta
=
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
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Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
