22
ATHENA :
Embedded
Vortex
86
AIO SBC
1:0 R/W
Software Watchdog Timer Expiration Event 0 Routing Select
When SFTMR0_STS is set to one, an SMI#/SFTIRQ/PCIRST#
will be generated according to the following combination.
00 : No effect
01 : SMI#
10 : SFTIRQ
11 : PCIRST#
Legacy Event Status Register:
Default Value: 00h
I/O
Address
Bit Access Description
7 R/WC Software Watch Dog Timer Event 1 Status (SFTMR1_STS)
This bit is set when the software watchdog timer expires the
second time. This status bit does not have its corresponding
enable bit and can survive under PCIRST#.
841h
6 R/WC Software Watch Dog Timer Event 0 Status (SFTMR0_STS)
This bit is set when the software watchdog timer expires the
second time. This status bit does not have its corresponding
enable bit and can survive under PCIRST#.
C Example
Those C code for DOS will show you more: (
Download C source code for DOS
and execute file
)
#include <conio.h>
#include <stdio.h>
#include <time.h>
void main()
{
clock_t clk;
int nTime = 5;
/* set time out */
outp(0x84a, nTime);
/* set timer clock to 1 second and "Timer Expiration Event 0/1" to reset system. */
outp(0x84b, 0x9c);
