3. Data Path > Buffer Structure
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PEB383 User Manual
July 25, 2011
Integrated Device Technology, Inc.
Confidential - NDA Required
The Data link layer applies a sequence number to the TLP received from transaction layer block, and
then calculates and appends a 32-bit LCRC value to ensure integrity during the transmission across the
physical lanes. A copy of the TLP sent to the physical layer is stored in the retry buffer for future replay
if there is negative acknowledgement from the other end component. The Retry buffer replays the
stored unacknowledged TLPs if it receives a NAK or replay timer expiration.
The Byte striper block of the physical layer unit appends start and end characters to the TLP received
from Data link layer, and then multiplexes the bytes of the packet onto the lanes. These bytes on the
lanes are scrambled using LFSR to eliminate repetitive bit patterns in the bit stream. The scrambled
8-bit characters are sent to the SerDes to convert to a 10-bit character in order to transmit it in a serial
bit stream on the physical lanes.
3.2.2
Downstream Transaction Management
In the downstream path, the physical layer unit converts the incoming serial bit stream into a parallel
symbol stream, de-scrambles the bytes in the transmit path, assembles packets, and then sends them to
the Data link layer unit (see
).
The Data link layer unit checks for LCRC and sequence number errors for packets received from the
physical layer unit. If there are no errors, LCRC and sequence number fields are stripped and resultant
TLP is sent to Transaction layer unit.
The Transaction layer unit checks for ECRC errors and framing violations based on header fields and
ECRC fields in the TLP received from the Data link layer unit. It extracts routing information based on
the header fields and determines whether to forward or reject the TLP. The ECRC field is stripped and
the resulting information in the TLP header, payload, and any detected error information, is sent to the
PCI Core.
The PEB383 uses receive flow control buffers in the PCI Core instead of in the PCIe Core to store
downstream requests or completions to be forwarded on the PCI Interface.
3.3
Buffer Structure
The following sub-sections describe the three PEB383 buffer structures:
•
Upstream non-posted buffer
•
Upstream posted buffer
•
Downstream non-posted buffer
•
Downstream posted buffer
3.3.1
Upstream Non-posted Buffer
There are four entries in the upstream read request queue. The 1-KB completion buffer is split up into
4 x 256-byte segments. When a read occurs on the PCI bus a read request is FIFO queued in one of the
4 entry non-posted request queue, if there is space. The PCI transaction is retried so that the master will
return when the bridge has fetched the data. If there are unallocated completion buffers (equal or
greater than the programed allocation size) a PCIe read request is sent upstream, requesting the
programed allocation amount of data.