KPCMCIA-12AIAOH User’s Manual
I/O Registers
C-3
Data FIFO register (base + 0)
The data FIFO register can be considered the access port to the data FIFO, which can hold up to
2048 data words of the A/D conversion result. The port is also used to program the data FIFO
thresholds.
Two consecutive bytes should be read from (written into) the port each time it is accessed.
Table C-2 illustrates the bit allocation.
NOTE
Although the data FIFO register is 8-bit wide, accessing the register
as a 16-bit word guarantees the integrity. The low byte (LSB, or the
least significant byte) should always be accessed first, followed by the
high byte (MSB, or the most significant byte).
Data FIFO operation modes
Depending on the mode of operation, the 16-bit word read from or written into the register has
different meanings, as described in Table C-3.
The selection bit in Table C-3 is also called the program/access control bit as defined in the com-
mand register (base + 7). Refer to “Command Register (base + 7, write only)” for details on set-
ting the bit and issuing commands to change the status of the A/D conversion (from scan to idle
or vice versa).
Table C-2
Data FIFO register bit allocation
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LSB
D7
D6
D5
D4
D3
D2
D1
D0
MSB
D15
D14
D13
D12
D11
D10
D9
D8
Table C-3
Data FIFO operation mode
Mode
Selection bit
A/D
Access
Operation
0
0, threshold
Idle
Read
Write
Verify data FIFO threshold
Program data FIFO threshold
1
1, data FIFO
Idle
Read
Write
Read data FIFO
Write data FIFO (diagnosis)
2
0, threshold
Run
Read
Write
Verify data FIFO threshold
Not allowed
3
1, data FIFO
Run
Read
Write
Read data FIFO
Not allowed
Summary of Contents for KPCMCIA-12AIAOH
Page 11: ...1 Introduction...
Page 15: ...2 Installation...
Page 17: ...3 Theory of Operation...
Page 25: ...4 I O Connections...
Page 28: ...5 Optional Accessories...
Page 30: ...A Specifications...
Page 33: ...B PCMCIA Interface...
Page 36: ...C I O Registers...
