Chapter 3
VXI Configuration Utility
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National Instruments Corporation
3-5
native byte order of the shared RAM is Intel (Little Endian), and you
want to present data to the VXIbus in Motorola (Big Endian) byte order,
you need to enable byte swapping for the appropriate window half. Byte
swapping is disabled for both windows by default.
Upper/Lower Half Window Address Mapping
This field determines if the upper/lower half windows map to the same
address or different addresses in system memory.
The default setting maps each half window to a unique local address on the
VXIpc controller. If you change this setting, the buffer in system RAM is
dual-ported to the VXIbus in both Little Endian and Big Endian byte order.
The setting of the
Byte Swapping
option for each half window determines
whether the byte order is Little Endian or Big Endian.
Resource Manager Delay
Note
This field is effective only when the VXIpc controller is at its default logical address
of 0. This logical address is required for the Resource Manager.
This field specifies the time in seconds that the Resource Manager (RM)
waits before accessing any other VXIbus device’s A16 configuration
registers.
Device Configuration Editor
The Device Configuration Editor configures options for remote controller
communication and local device settings.
System IRQ Level
Remote controllers can report events such as triggers and DMA to the
VXIpc through a VXI IRQ line. This field selects which VXI IRQ level
the remote controllers should use to report such events.
RM Delay Range
Default Value
0 to 65535 s
5
Interrupt Request Levels
Default Value
1 to 7 or disabled
Disabled
