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55
NISE 108 User Manual
Appendix B: GPI/O Programming Guide
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B: GPI/o P
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GPI/O (General Purpose Input/Output) pins are provided for custom system
design. This appendix provides definitions and its default setting for the ten
GPI/O pins in NISE 108. The pin definition is shown in the following table:
Pin
GPI/O Mode
PowerOn
default
Address
Pin
GPI/O Mode
Address
1
VCC
-
-
2
GND
-
3
GPO0
Low
A04h (Bit6)
4
GPI0
A06h (Bit0)
5
GPO1
Low
A04h (Bit7)
6
GPI1
A06h (Bit1)
7
GPO2
Low
A05h (Bit0)
8
GPI2
A06h (Bit2)
9
GPO3
Low
A05h (Bit1)
10
GPI3
A06h (Bit3)
11
GPO4
Low
A07h (Bit4)
12
GPI4
A06h (Bit4)
13
GPO5
Low
A07h (Bit5)
14
GPI5
A06h (Bit5)
15
GPO6
Low
A07h (Bit6)
16
GPI6
A06h (Bit6)
17
GPO7
Low
A07h (Bit7)
18
GPI7
A06h (Bit7)
19
GND
-
-
20
GND
-
The bit is Set/Clear indicated output High/Low.