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Registers Format
4.5 A/D Operation Mode Control Register
The A/D operation includes the analog signal conversion and the data
transformation. This register controls the internal trigger mode and data
transformation method. It is initialized as software trigger and program
polling transfer when your PC is reset or power on. The details of the A/D
operation is illustrated in Chapter 5. There are four operation modes
shown as following .
Address : BASE + 11
Attribute: write only
Data Format:
Bit
7
6
5
4
3
2
1
0
BASE+11
X
X
X
X
X
S2
S1
S0
S2
S1
S0
Operation Mode Description
0
0
0
Internal trigger is disable
0
0
1
software trigger and program polling (default)
0
1
0
timer pacer trigger and DMA transfer
1
1
0
timer pacer trigger and interrupt transfer.
Note:
1. When your system power on or reset, the A/D operation will be
initialized as " software trigger and program polling" mode.
2. No matter which mode is selected, the external trigger is available if
the JP4 is set to be external trigger.
3. As long as not the DMA mode is not used, the program polling is
alwayse possible. The syncronization of A/D conversion and data
transfer should be concerned when use program polling.
4. The interrupt will be occurred after end of conversion if the "timer
pacer trigger and interrupt transfer" mode is selected. If you want to
use pacer trigger and interrupt transfer mode
,
please enable the
IRQ level.
4.6 Interrupt Status Register
The Interrupt Status Register is used to clear the interrupt status for next
new interrupt can be generated. If the ACL-8112 is in interrupt data
transfer mode, a hardware status flag will be set after each A/D
conversion. You have to clear the status flag by just writing any data to
Summary of Contents for ACL-8112 Series
Page 1: ...NuDAQ ACL 8112 Series Enhanced Multi Functions Data Acquisition Cards User s Guide ...
Page 4: ......
Page 40: ...32 Registers Format 1 1 1 1 1 000 Unipolar N A Table 4 2 1 Function of the Gain Control Bits ...
Page 44: ...36 Registers Format Base 14 DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8 ...
Page 46: ...38 Registers Format Base 2 Counter 2 Register R W Base 3 8254 CONTROL BYTE ...
Page 71: ...C Language Library 63 ...
Page 81: ...C Language Library 73 Example See Demo Program AD_Demo4 C ...
Page 85: ...C Language Library 77 ERR_AD_INTNotSet Example See demo program AD_Demo2 C ...
