Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 68
LC4.5E AA
9.
9.8.4
Audio: Lip Sync (Optional)
A “lip sync” circuit with an audio delay can be added (not for all
models/regions), in order to synchronise with video delay due
to the complexity of the display processing. This video delay is
significant, due to memory based processing. For instance, the
“frame rate conversion” causes a delay of two frames, while the
LCD panel response also causes a delay.
The circuit is a (16 bit) FIFO based digital delay. E.g.: the
memory size required for a 80 ms delay (with a data clock of
1.024 MHz) can be calculated with: Memory size = delay time
* f_clk. This gives: 80 ms * 1.024 MHz = 81920 bits.
To calculate the memory size for a 16 bits mode I
2
S digital
audio stream we must use the following data:
•
f_s = 32 kHz, 16 bits, stereo
•
Data clock = 32 kHz * 16 * 2 = 1.024 MHz
•
Memory size for 1 ms delay = 1 ms * 1.024 MHz = 1024 bits
= 1 kbit
So, the delay time of 80 ms can be built with five steps of 16
ms, which is close to the frame rate. Therefore, a 128 kbit
SRAM (16 x 8) is chosen.
Note
that above described calculation is just an example,
values in the set can deviate.
9.9
Control
9.9.1
Hercules
The System Board has two main micro-controllers on board.
These are:
•
On-chip x86 micro-controller (OCM) from Genesis LCD TV/
Monitor Controller.
•
On-chip 80C51 micro-controller from Philips
Semiconductor UOCIII (Hercules) series.
Each micro-controller has it own I
2
C bus which host its own
internal devices.
The Hercules is integrated with the Video and Audio Processor.
For dynamic data storage, such as SMART PICTURE and
SMART SOUND settings, an external NVM IC is being used.
Another feature includes an optional Teletext/Closed Caption
decoder with the possibility of different page storage depending
on the Hercules type number.
9.9.2
Block Diagram
The block diagram of the Micro Controller application is shown
below.
Figure 9-5 Micro controller block diagram
HERCULES
SCALER
Tuner
ComPair
NVM
Sound
Amp
MUX
NVM
GPROBE for Debug
or ComPair(Scaler)
SDA
SCL
TV_IRQ
TV_SC_COM
+3V3STBY
1407
1406
1405
PC_DET
SD_PCHD_SEL
PC_HD_SEL
POWER_DOWN
LAMP_ON_OFF
PANEL_PWR_CTL
HD_FILTER
BACK_LIGHT_ADJ1
Flash ROM
83
GPIO2
NVM_WP
IIC BUS 2
93
NVRAM
_SDA
92
NVRAM
_SCL
72
71
187
193
194
85
(GPIO4)
88
(GPIO5)
89
(GPIO6)
68
(PBIAS)
67
(PPWR)
99
(PWM1)
98
(GPIO11/
PWM0)
78 DDC_SDA_VGA
77 DDC_SCL_VGA
82 GPIO1
81 GPIO0
+3V3STBY
111
GPIO23
90 GPIO7
ROM_ADD0-17
ROM_DATA0-7
5 6 7
103 106 107 108
HIGH or
LOW
level input
IIC BUS1
NVM_WP
Sound_Enable
HREC
RST
Sel IF/
SDM
Status1
Light
Sense
TV_IR
RC
P50_LINE_ITV_IR_SW
EXT_MUTE
Standby
POWER
DOWN
127
P1.4
114
P2.3
116
ADC1
115
ADC0
123
P2.5
97
INT0
102
P0.4
122
P2.4
126
INT2
128
P1.5
SDA 109
SCL 108
INT1 98
P1.1 99
Keyboard
ADC3 120
111
P2.0
104
P0.2
E_14490_062.eps
160904
