14
© Sealevel Systems, Inc.
4021 Manual | SL9154 11/2021
Programming the ACB 56
Control/Status Port
The
ACB 56
occupies eight
I
nput/
O
utput (I/O) addresses. The first four are used by the SCC chip, while the
fifth address (Base+4) is the address of the on-board
Control/Status Port.
This port is used to set the
D
ata
T
erminal
R
eady (DTR) signal, to enable or disable DMA under program control, and to monitor the
D
ata
S
et
R
eady (DSR) input signals from the modem. The following table lists bit positions of the Control/Status
Port.
Bit
Output Port Bits
Input Port Bits
0
DTR A
1=On, 0=Off
DSR A 1=On, 0=Off
1
DTR B
1=On, 0=Off
DSR B 1=On, 0=Off
2
Not Used
Not Used
3
Not Used
Not Used
4
Not Used
Not Used
5
Not Used
Not Used
6
Not Used
Not Used
7
DMA Enable
1=On, 0=Off
Not Used
Figure 8
–
Control/Status Register Bit Definitions
Software Examples
Function
Program Bits
Turn On CH. A DTR
Write Out Base+4,XXXX XXX1
Turn On CH. B DTR
Write Out Base+4,XXXX XX1X
Turn Off CH. A DTR
Write Out Base+4,XXXX XXX0
Turn Off CH. B DTR
Write Out Base+4,XXXX XX0X
Enable DMA Drivers
Write Out Base+4,1XXX XXXX
Disable DMA Drivers
Write Out Base+4,0XXX XXXX
Test CH. A DSR
Read In Base+4, Mask=0000 0001
Test CH. B DSR
Read In Base+4, Mask=0000 0010
Figure 9
–
Control/Status Register Examples