Manual PCI-DA12-8/16
18
Programming the Digital I/O Circuit
The digital I/O circuit is comprised of an Intel 8255, a direction control latch, and four bi-directional buffers
with 10K pull-ups. Please refer to the 8255-5 specification in Appendix A for a detailed description of the
PPI.
Address
Assignment
Operation
Base A20 Port A
Read/Write
Base A21 Port B
Read/Write
Base A22 Port C
Read/Write
Base A23 Control
Read/Write
Table 5-4:
I/O Address Table for Digital
The circuit is designed to use the PPI in mode 0 wherein:
a.
There are two 8-bit ports (A and B) and two 4-bit ports (C Hi and C Lo).
b.
Any port can be configured as an input or an output.
c.
Outputs are latched.
d.
Inputs are not latched.
The 8-bit control register is used to set the mode and direction of the ports.
Bit
Assignment
Function
D0
Port C Lo (C0-C3)
1 = Input, 0 = Output
D1
Port B
1 = Input, 0 = Output
D2
Mode Selection
1 = Mode 1, 0 = Mode 0
D3
Port C Hi (C4-C7)
1 = Input, 0 = Output
D4
Port A
1 = Input, 0 = Output
D5,D6 Mode Selection
01 = Mode 1, 00 = Mode 0 1X = Mode 2
D7
Mode Set Flag&Tristate 1 = Active & Tristate
Table 5-5:
Control Register Bit Assignments
Note
PPI Mode 1 cannot be used with this circuit without modification. Thus, bits D2, D5, and D6 should
always be set to "0". If your card has been modified to operate in Mode 1, then there is an Addendum
sheet in the front of this manual describing that modification. This circuit cannot be modified to operate in
PPI Mode.
The circuit is initialized by the computer Reset command (all ports set for input and all buffers enabled).
Both the 8255 control register and the buffer direction latch are accessed at the same address.
The 8255 control register will latch a new configuration byte when it's written to with bit D7 high. If, for
example, hex 80 is sent to Base 23, the group 0 PPI will be configured in mode 0 with ports A,
B, and C as outputs.
