ADV8005 Hardware Reference Manual
UG-707
6.11.3.
Audio Configuration
The
fields must be used to configure the Tx core according to the incoming audio
input. Refer to
to
for more information on the audio timing formats. There is a manual control to set the audio sample
packet layout to be 0 or 1 using the
and
ext_layout
, TX2 Main Map,
Address 0xF44A[3]
This bit is used to set the external audio layout value.
Function
ext_layout
Description
0 (default)
Dual channel
1
Multi channel
layout_sel
, TX2 Main Map,
Address 0xF44A[2]
This bit is used to select the audio layout value.
Function
layout_sel
Description
0 (default)
Internal layout
1
External layout
audio_input_sel[2:0]
, TX2 Main Map,
Address 0xF40A[6:4]
This signal is used to specify the audio mode when the input format of the audio is specified.
Function
audio_input_sel[2:0]
Description
000 (default)
I2S
001
SPDIF
010
One Bit Audio (DSD)
011
High Bit Rate (HBR) Audio
100
Reserved
i2s_format[1:0]
, TX2 Main Map,
Address 0xF40C[1:0]
This signal is used to set the format of the I2S audio stream input to the part.
Function
i2s_format[1:0]
Description
00 (default)
I2S
01
Right justified
10
Left justified
11
AES3 direct mode
audio_mode[1:0]
, TX2 Main Map,
Address 0xF40A[3:2]
This signal is used to specify the exact audio mode when the input format of the audio is specified.
Case 1: DSD (audio_input_select = 0b010): 0x = DSD raw mode; 1x = SDIF-3 mode
Case 2: HBR (audio_input_select = 0b011): 00 = 4 stream, with Bi-Phase Mark (BPM) encoding; 01 = 4 stream, without BPM encoding; 10 =
1 stream, with BPM encoding; 11 = 1 stream, without BPM encoding
Case 3: DST (audio_input_select = 0b100): x0 = normal mode; 01 = DST 2x clock; 10 = DST 1x clock (DDR)
Function
audio_mode[1:0]
Description
Case 1
DSD (AUDIO_INPUT_SELECT = 0b010)
0x
DSD raw mode
1x
SDIF-3 mode
Case 2
HBR (AUDIO_INPUT_SELECT = 0b011)
00 (default)
4 stream, with Bi-Phase Mark (BPM) encoding
01
4 stream, without BPM encoding
10
1 stream, with BPM encoding
11
1 stream, without BPM encoding
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