PST & PSS & PSH SERIES PROGRAMMABLE POWER SUPPLY
PROGRAMMER MANUAL
43
Use the serial poll or the
*STB?
Query to read the contents of the SBR.
The bits in the SBR are set and cleared depending on the contents of the
Standard Event Status Register (SESR), the Standard Event Status
Register (SESR), and the Output Queue.
Standard Event Status Register (SESR)
: Table 7 shows the SESR
Table 7: Standard Event Status Register (SESR)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PON
URQ
CME
EXE
DDE
QYE
NU
OPC
The bit 0 (OPC, Operation Complete) shows that the operation is
completed. This bit is active when all pending operations are completed
following an
*OPC
command. The bit 1 is always zero. The bit 2 (QYE,
Query Error) indicates a command or query protocol error. The bit 3
(DDE, Device Error) shows that a device error occurred. The bit 4 (EXE,
Execution Error) shows that an error occurred while the power supply
was executing a command or query. The bit 5 (CME, Command Error)
shows that an error occurred while the power supply was par s ing a
command or query. The bit 6 (USR, User Request) indicates the LOCAL
button was pushed. The bit 7 (PON, Power On) shows that the power
supply was powered on.
Use the *ESR? Query to read the SESR. Read the SESR and clear the
bits of the registers so that the register can accumulate information about
new events.
Enable Registers
The enable regi sters determine whether certain events are reported to the
Status Byte Register and SRQ. The programmable power supply has the
PST & PSS & PSH SERIES PROGRAMMABLE POWER SUPPLY
PROGRAMMER MANUAL
44
following enable registers.
l
Event Status Enable Register (ESER)
l
OPERation Enable Register
l
QUEStionable Enable Register
l
Service R equest Enable Register (SRER)
When one of the bits of the enable registers is high and the corresponding
bit in the status register is high, the enable registers will perform a
logical OR function, the output that controls the set bit of the Status Byte
Register is high.
Various commands set the bits in the enable registers. The following
sections describe the enable registers and the commands that set them.
Event Status Enable Register (ESER)
: The ESER controls which types of
events are summarized by the Event Status Bit (ESB) in the SBR. The
bits of the ESER correspond to the bits of the SESR.
Use the
*ESE
command to set the bits in ESER. Use the
*ESE?
query to
read it.
OPERation Enable Register
: Even though the OPERation Enable
Register is present in the programmable power supplies, the OPERation
registers do not report any conditions.
QUEStionable Enable Register
: The QUEStionable Enable Register
controls which types of events are summarized by the QUES status bit in
the SBR. Use the
STATus:QUEStionable:ENABle
command to set
the bits in the QUEStionable Enable register. Use the
STATus:QUEStionable:ENABle?
query to read it.
Service Request Enable Register (SRER)
: The SRER controls which bits
in the SBR generate a service request.
Use the
*SRE
command to set the SRER. Use the
*SRE?
query to read
it.
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