Elgar CW-P Series
Status Register Definitions
Programming Manual
A-3
.
/ # .$
Set whenever the last command is completed and the CW is ready to accept
another command, or when query results are available.
!
Set when a query is made for which no response is available.
- 0
. *
Set for device-specific errors. These errors are entered in the System Error
Queue and have error codes greater than 0. See Appendix B for error
descriptions.
1 -
Set when a parameter exceeds its allowed range.
/ # # *
Set for a syntax error.
2
Set once at power-up. The Status Byte ESR bit is not set.
3
.
!
%$
(
The Operation Status and Questionable Status registers always return 0 when queried.
The Operation Status Enable and Questionable Status Enable registers can be
programmed and queried to allow SCPI compatibility, but have no effect on the
Operation Status and Questionable Status registers.
&
!
The CW Series maintains an Error/Event Queue as defined by SCPI. The queue holds
up to 10 errors and events. It is queried using the SYSTem:ERRor? command, which
reads in a first in, first out manner. The read operation removes the entry from the
queue. The *CLS command clears all entries from the queue.
)
$
$$ .
Performing a serial poll will not modify the Status Byte other than to clear the RQS (bit
6) for a CW requesting service. Queries affecting the status registers and subsequent
serial polls are described below:
•
*STB? clears the Status Byte
•
*ESR? clears the ESR and bit 5 of the Status Register
•
SYSTem:ERRor? clears bit 2 of the Status Register if the queue is empty.
Summary of Contents for CW 1251P
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