Chapter 3 Memory Mapping Control (S12XMMCV4)
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
193
3.3.2
Register Descriptions
3.3.2.1
MMC Control Register (MMCCTL0)
Read: Anytime. In emulation modes read operations will return the data from the external bus. In all other
modes the data is read from this register.
Write: Anytime. In emulation modes write operations will also be directed to the external bus.
The MMCCTL0 register is used to control external bus functions, like:
•
Availability of chip selects. (See
and
)
•
Control of different external stretch mechanism. For more detail refer to the S12X_EBI
BlockGuide.
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Address: 0x000A PRR
7
6
5
4
3
2
1
0
R
CS3E1
CS3E0
CS2E1
CS2E0
CS1E1
CS1E0
CS0E1
CS0E0
W
Reset
0
0
0
0
0
0
0
ROMON
1
1. ROMON is bit[0] of the register MMCTL1 (see
= Unimplemented or Reserved
Figure 3-3. MMC Control Register (MMCCTL0)
Table 3-5. Chip Selects Function Activity
Register Bit
Chip Modes
NS
SS
NX
ES
EX
ST
CS0E[1:0], CS1E[1:0],
CS2E[1:0], CS3E[1:0]
Disabled
(1)
1. Disabled: feature always inactive.
Disabled
Enabled
(2)
2. Enabled: activity is controlled by the appropriate register bit value.
Disabled
Enabled
Disabled
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
