Freescale Semiconductor MMA7455L Technical Data Manual Download

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Sensors
Freescale Semiconductor

MMA7455L

Signed byte data (2’s complement): 0g = 8’h00

DRDY

1: Data is ready

0: Data is not ready

DOVR

1: Data is over written

0: Data is not over written

PERR

1: Parity error is detected in trim data. Then, self-test is dis-
abled

0: Parity error is not detected in trim data

LDX

1: Level detection detected on X-axis

0: Level detection not detected on X-axis

LDY

1: Level detection detected on Y-axis

0: Level detection not detected on Y-axis

LDZ

1: Level detection detected on Z-axis

0: Level detection not detected on Z-axis

PDX *Note

1: Pulse is detected on X-axis at single pulse detection

0: Pulse is not detected on X-axis at single pulse detection

PDY *Note

1: Pulse is detected on Y-axis at single pulse detection

0: Pulse is not detected on Y-axis at single pulse detection

PDZ *Note

1: Pulse is detected on Z-axis at single pulse detection

0: Pulse is not detected on Z-axis at single pulse detection

Note:

This bit value is not valid at double pulse detection

INT1

1: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is detected

0: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is not detected

INT2

1: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is detected

0: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is not detected

*Note:

Must define DRDY to be an output to either INT1 or

not. This is done through bit DRPD located in Register $16.

I2CDIS

0: I

C and SPI are available.

1: I

C is disabled.

DVAD[6:0]: I

C device address

UI2[7:0]: User information

$08: 8bits Output Value Z (Read only)

Bit

ZOUT[7]

ZOUT [6]

ZOUT [5]

ZOUT [4]

ZOUT [3]

ZOUT [2]

ZOUT [1]

ZOUT [0]

Function

Default

$09: Status Register (Read only)

Bit

PERR

DOVR

DRDY

Function

Default

$0A: Detection Source Register (Read only)

Bit

LDX

LDY

LDZ

PDX

PDY

PDZ

INT2

INT1

Function

Default

$0D: I

C Device Address (Bit 6-0: Read only, Bit 7: Read/Write)

Bit

I2CDIS

DVAD[6]

DVAD[5]

DVAD[4]

DVAD[3]

DVAD[2]

DVAD[1]

DVAD[0]

Function

Default

$0E: User Information (Read Only: Optional)

Bit

UI[7]

UI[6]

UI[5]

UI[4]

UI[3]

UI[2]

UI[1]

UI[0]

Function

0/OTP

Default

Summary of Contents for MMA7455L

Page 1: ...Features Digital Output I2C SPI 3mm x 5mm x 1mm LGA 14 Package Self Test for Z Axis Low Voltage Operation 2 4 V 3 6 V User Assigned Registers for Offset Calibration Programmable Threshold Interrupt O...

Page 2: ...Detection 11 PULSE DETECTION 12 18 Control 1 Read Write Disable X Y or Z for Pulse Detection 12 19 Control 2 Read Write Motion Detection OR condition or Freefall Detection AND condition 12 CASE 1 Sin...

Page 3: ...ltiple sequential registers of the MMA7455L 17 SPI Timing Diagram for 8 Bit Register Read 4 Wire Mode 18 SPI Timing Diagram for 8 Bit Register Read 3 Wire Mode 18 SPI Timing Diagram for 8 Bit Register...

Page 4: ...e Y LSB Read only 22 03 10bits Output Value Y MSB Read only 22 05 10bits Output Value X MSB Read only 22 06 8bits Output Value X Read only 22 07 8bits Output Value Y Read only 22 08 8bits Output Value...

Page 5: ...tal Power for I O pads Input 2 GND Ground Input 3 N C No internal connection Leave unconnected or connect to Ground Input 4 IADDR0 I2 C Address Bit 0 optional Input 5 GND Ground Input 6 AVDD Analog Po...

Page 6: ...rge of this magnitude can alter the performance or cause failure of the chip When handling the accelerometer proper ESD precautions should be followed to avoid exposing the device to discharges which...

Page 7: ...8 bit 8g range 25 C 10 bit 58 29 14 5 58 64 32 16 64 70 35 17 5 70 count g count g count g count g Self Test Output Response Zout STZ 32 64 83 count Temperature Compensation for Offset TCO 3 5 0 5 3...

Page 8: ...that the distance to the fixed beams on the other side decreases The change in distance is a measure of accel eration The g cell beams form two back to back capacitors Figure 3 As the center beam mov...

Page 9: ...he device is controlled through the mode control register by accessing the two mode bits as shown in Table 6 Measurement Mode The device can read XYZ measurements in this mode The pulse and threshold...

Page 10: ...Z Threshold X or Y or Z Threshold LDPL 1 Level detection polarity is negative detecting condition is AND for all 3 axes X and Y and Z Threshold X and Y and Z Threshold 18 Control 1 Read Write Setting...

Page 11: ...reshold OR Z Threshold Reg 18 THOPT 0 Reg 19 LDPL 0 Set Threshold to 3g which is 47 counts 16 counts g Set register 1A LDTH 2F CASE 3 Freefall Detection Integer Value X Threshold AND Y Threshold AND Z...

Page 12: ...able X YDA Disable Y ZDA Disable Z 19 Control 2 Read Write Motion Detection OR condition or Freefall Detection AND condition PDPL 0 Pulse detection polarity is positive and detecting condition is OR 3...

Page 13: ...time window for the interrupt to trigger Figure 5 Freefall Detection in Pulse Mode 1B Pulse Detection Threshold Limit Value Read Write D7 D6 D5 D4 D3 D2 D1 D0 Reg 1B PDTH 7 PDTH 6 PDTH 5 PDTH 4 PDTH...

Page 14: ...ection source register 0A Figure 6 Double Pulse Detection 1B Pulse Detection Threshold Limit Value Read Write D7 D6 D5 D4 D3 D2 D1 D0 Reg 1B PDTH 7 PDTH 6 PDTH 5 PDTH 4 PDTH 3 PDTH 2 PDTH 1 PDTH 0 Fun...

Page 15: ...INT1 and either single or double pulse on INT2 INT1 register bit can no longer be cleared by setting CLR_INT1 bit It is cleared by setting CLR_INT2 bit In this case setting CLR_INT2 clears both INT1...

Page 16: ...s The MMA7455L communi cates only in slave operation where the device address is 1D Multiple read and write modes are available The protocol supports slave only operation It does not support Hs mode 1...

Page 17: ...he data transfer The data sent to the MMA7455L is now stored in the ap propriate register See Figure 9 Figure 7 Single Byte Read The Master is reading one address from the MMA7455L Figure 8 Multiple B...

Page 18: ...SDI and SDO data lines are driven at the falling edge of the SPC and should be captured at the rising edge of the SPC Read and write register commands are completed in 16 clock pulses or in multiples...

Page 19: ...D Ground Input 3 N C No internal connection Leave unconnected or connect to Ground Input 4 IADDR0 I2 C Address Bit 0 Input 5 GND Ground Input 6 AVDD Analog Power Input 7 CS SPI Enable 0 I2C Enable 1 I...

Page 20: ...imal 3 PCB layout of power and ground should not couple power supply noise 4 Accelerometer and microcontroller should not be a high current path 5 Any external power supply switching frequency should...

Page 21: ...C device address I2CDIS DAD 6 DAD 5 DAD 4 DAD 3 DAD 2 DAD 1 DAD 0 0E USRINF User information Optional UI 7 UI 6 UI 5 UI 4 UI 3 UI 2 UI 1 UI 0 0F WHOAMI Who am I value Optional ID 7 ID 6 ID 5 ID 4 ID 3...

Page 22: ...plement 0g 8 h00 01 10bits Output Value X MSB Read only D7 D6 D5 D4 D3 D2 D1 D0 Bit XOUT 9 XOUT 8 Function 0 0 0 0 0 0 0 0 Default 02 10bits Output Value Y LSB Read only D7 D6 D5 D4 D3 D2 D1 D0 Bit YO...

Page 23: ...egister 18 and is detected 0 Interrupt assigned by INTRG 1 0 bits in Control 1 Register 18 and is not detected INT2 1 Interrupt assigned by INTRG 1 0 bits in Control 1 Register 18 and is detected 0 In...

Page 24: ...P Default 10 Offset Drift X LSB Read Write The following Offset Drift Registers are used for setting and storing the offset calibrations to eliminate the 0g offset Please refer to Freescale applicatio...

Page 25: ...atus is output to INT1 DRDY PIN 1 Data ready status is not output to INT1 DRDY PIN 14 Offset Drift Z LSB Read Write D7 D6 D5 D4 D3 D2 D1 D0 Bit ZOFF 7 ZOFF 6 ZOFF 5 ZOFF 4 ZOFF 3 ZOFF 2 ZOFF 1 ZOFF 0...

Page 26: ...A 1 Y axis is disabled for detection 0 Y axis is enabled for detection ZDA 1 Z axis is disabled for detection 0 Z axis is enabled for detection THOPT This bit is valid for level detection only not val...

Page 27: ...eshold Limit Value Read Write D7 D6 D5 D4 D3 D2 D1 D0 Bit LDTH 7 LDTH 6 LDTH 5 LDTH 4 LDTH 3 LDTH 2 LDTH 1 LDTH 0 Function 0 0 0 0 0 0 0 0 Default 1B Pulse Detection Threshold Limit Value Read Write D...

Page 28: ...1g 1F 4g 7F 8g Mode 8g 80 1g F1 0g 00 1g 0F 8g 7F Side View X OUT 0g 00 Y OUT 1g 3F Z OUT 0g 00 X OUT 1g 3F Y OUT 0g 00 Z OUT 0g 00 X OUT 1g C1 Y OUT 0g 00 Z OUT 0g 00 1 6 5 4 3 2 13 12 11 10 9 8 14...

Page 29: ...a solder mask layer to avoid bridging and shorting between solder pads SOLDERING AND MOUNTING GUIDELINES FOR THE LGA ACCELEROMETER SENSOR TO A PC BOARD These guideline are for soldering and mounting...

Page 30: ...pattern underneath package as shown in Figure 20 3 PCB land pad is 0 9 mm x 0 6 mm which is the size of the package pad plus 0 1 mm as shown in Figure 21 4 The solder mask opening is equal to the size...

Page 31: ...use a cleanable solder paste with an additional cleaning step after SMT mount 10 Do not use a screw down or stacking to fix the PCB into an enclosure because this could bend the PCB putting stress on...

Page 32: ...455L Current Distribution Charts LSL USL Target 0 02 0 01 0 0 01 0 02 Ysens_ DegreeC_ 40to85 LSL USL Target 0 03 0 02 0 01 0 0 01 0 02 0 03 Zsens_ DegreeC_ 40to85 LSL USL Target 3 2 1 0 1 2 3 Zoff_mg...

Page 33: ...Sensors Freescale Semiconductor 33 MMA7455L PACKAGE DIMENSIONS CASE 1977 01 ISSUE A 14 LEAD LGA...

Page 34: ...Sensors 34 Freescale Semiconductor MMA7455L PACKAGE DIMENSIONS CASE 1977 01 ISSUE A 14 LEAD LGA...

Page 35: ...ates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with su...

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