SA.45s Chip-Scale Atomic Clock
SA.45s CSAC User Guide Revision D
17
Figure 11 • CSACdemo Ultra-Low Power Mode Configuration Panel
Enter the desired settings and click
to upload new settings to the CSAC.
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3.3.13
1PPS Phase Measurement Mode
For firmware versions 1.08 and later, an additional phase meter is implemented with extended range
(±500 ms) to measure the time difference between the internal CSAC 1PPS (pin 10) and the externally
applied reference 1PPS (pin 9). Measurement resolution is approximately 100 ns.
Note: 1PPS phase measurement mode utilizes both the extended-range phase meter and the high-
resolution phase meter (450 ps resolution) used in 1PPS Disciplining (see
). In this mode, the phase measured by the high-resolution meter is reported if phase is in the range
±1 µs (approximate), otherwise the extended-range meter is reported.
Phase measurement mode may be enabled/disabled through bit 2 (0x0004) in the mode register (see
). Phase Measurement mode, Automatic
"Set/Clear Operating Modes (M)" (see page 24)
Synchronization, and Disciplining are all mutually exclusive, so enabling a 1PPS-related option in the
mode register disables the other 1PPS-related options.
3.4
Programmers Reference
Pins 5 and 6 provide a serial interface for communication with the CSAC. The protocol is fundamentally
similar to RS232, with the exception that the voltage levels are CMOS (0–VCC), rather than ±12 V.
The data rate and word structures are as follows:
57,600 Baud
8 data bits
No parity
1 stop bit (8-N-1)
No flow control
For interfacing with a standard RS232 controller interface, which requires ±12 V logic levels, an external
level shifter must be employed, such as the Maxim MAX202 employed on the evaluation board (see
"Notes on the Evaluation Board" (see page 37)
3.4.1
Overview of Telemetry Interface
The CSAC communicates exclusively with printable (non-binary) ASCII characters.
In general, commands are to be preceded by an exclamation point ( ) and followed by a carriage-return
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