108
Appendix C. Command language
Note:
The external reference clock must have power between -10dBm and +10dBm.
The output of the
CLOCK
command should be checked after using the
CLKSRC
command
to ensure that synchronisation was successful.
Never operate the
ARF/XRF
in exter-
nal clock mode without providing a valid reference clock, as undefined behaviour
can result.
CLOCK
CLOCK,ch
Reads the current
DDS
system clock frequency for the specified chan-
nel, as measured by the
FPGA
. This should return exactly 1000 MHz,
indicating
that
the
system
is
correctly
synchronised
to
the
clock
source.
CLKDIAG
CLKDIAG
Report diagnostic information about the status of the internal clocks.
When supplying an external clock, check the diagnostic information
to ensure that the clock input is registering correctly and is enabling
a stable system clock.
C.9
Table mode
Table mode gives access to the powerful sequencing functionality of
the
ARF
/
XRF
devices (chapter 8).
XRF
devices also have access to
advanced table mode (chapter 9), which is controlled using the same
TABLE
commands.
ARM
TABLE,ARM,ch
Loads the table into the
FPGA
for execution, typically taking
∼
100
µ
s.
The table then begins execution upon receiving a software trigger
(
TABLE,START
) or hardware trigger on the
DB15
connector (
§
7.1).
Note: The table length
must
be defined before issuing
ARM
or
START
;
failure to do so may result in undefined behaviour. The convenience
functions (e.g.
TABLE,APPEND
) automatically update the table length.
Summary of Contents for ARF021
Page 1: ...Agile RF Synthesizer AOM driver ARF021 ARF421 XRF021 XRF421 Version 1 5 0 Rev 6 ...
Page 4: ...ii ...
Page 10: ...viii Contents ...
Page 26: ...16 Chapter 3 Communications ...
Page 44: ...34 Chapter 5 External modulation ...
Page 50: ...40 Chapter 6 PID stabilisation ...
Page 64: ...54 Chapter 7 Digital I O ...
Page 100: ...90 Chapter 9 Advanced table mode XRF ...
Page 128: ...118 Appendix C Command language ...
Page 133: ......
