AN4536 Application Note Rev. 2.0 1/2014
16
Freescale Semiconductor
OTP Overview
Table 19
shows a summary of all the registers related to the linear regulators, and
Table 20
to
Table 22
provide a
general bit description of the linear regulator OTP registers.
Table 19. OTP Linear Regulators Register Summary
Register Address
Output
OTP VSNVS VOLT
0xC0
VSNVS OTP Output voltage set point
OTP VREFDDR SEQ
0xC4
VREFDDR OTP power-up sequence selection
OTP VGEN1 VOLT
0xC8
VGEN1 OTP Output voltage set point
OTP VGEN1 SEQ
0xC9
VGEN1 OTP power-up sequence selection
OTP VGEN2 VOLT
0xCC
VGEN2 OTP Output voltage set point
OTP VGEN2 SEQ
0xCD
VGEN2 OTP power-up sequence selection
OTP VGEN3 VOLT
0xD0
VGEN3 OTP Output voltage set point
OTP VGEN3 SEQ
0xD1
VGEN3 OTP power-up sequence selection
OTP VGEN4 VOLT
0xD4
VGEN4 OTP Output voltage set point
OTP VGEN4 SEQ
0xD5
VGEN4 OTP power-up sequence selection
OTP VGEN5 VOLT
0xD8
VGEN5 OTP output voltage set point
OTP VGEN5 SEQ
0xD9
VGEN5 OTP power-up sequence selection
OTP VGEN6 VOLT
0xDC
VGEN6 OTP output voltage set point
OTP VGEN6 SEQ
0xDD
VGEN6 OTP power-up sequence selection
Table 20. OTP VSNVS VOLT Register Description
Name
Bit #
Description
VSNVS_VOLT
2:0
Sets the VSNVS output voltage to be programmed on the
OTP fuses and loaded during power-up
000 = 1.0 V
001 = 1.1 V
010 = 1.2 V
011 = 1.3 V
100 = 1.5 V
101 = 1.8 V
110 = 3.0 V
111 = RSVD
UNUSED
7:3
UNUSED
Table 21. OTP VGENx VOLT Register Description
Name
Bit #
Description
VGENx_VOLT
3:0
Sets the VGENx output voltage to be programmed on the
OTP fuses and loaded during power-up. Refer to the VGENx
output voltage configuration table on Data Sheet for all
possible configurations.
UNUSED
7:4
UNUSED
Table 22. OTP xxxx SEQ Register Description
Name
Bit #
Description
xxxx_SEQ
4:0
Assign the power-up sequence slot 0-31 for the specific linear
regulator or VREFDDR voltage
UNUSED
7:5
UNUSED
