UM2264
BlueNRG-1 peripheral
driver examples
DocID030868 Rev 1
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MFT timers:
this example shows how configure peripherals MFT1, MFT2 and SysTick to
generate three timer interrupts at different rate: MFT1 at 500 ms, MFT2 at 250 ms and
SysTick at 1 second.
15.9
UART examples
DMA
: IO8 and IO11 are configured as UART pins and DMA receive and transmit requests
are enabled. Each byte received from UART is sent back through UART in an echo
application (USB-to-SERIAL must be connected to the PC).
Interrupt
: IO8 and IO11 are configured as UART pins and receive and transmit interrupts
are enabled. Each byte received from UART is sent back through UART in an echo
application (USB-to-SERIAL must be connected to the PC).
Polling
: IO8 and IO11 are configured as UART pins. Each byte received from UART is
sent back through UART in an echo application (USB-to-SERIAL must be connected to the
PC).
15.10
WDG examples
Reset
: demonstrates the watchdog functionality and using it to reboot the system when the
watchdog interrupt is not serviced during the watchdog period (interrupt status flag is not
cleared).
The watchdog is configured to generate the interrupt with a 15 s interval, then it is enabled
and monitors the state of the PUSH1 button (IO13 pin). Any change on this pin triggers the
watchdog counter to reload and restart the 15 s interval measurement.
If the IO13 pin state does not change during this interval, the watchdog generates an
interrupt that is intentionally not cleared and therefore remains pending; the watchdog
interrupt service routine is therefore called continuously and the system is stuck in the
watchdog interrupt handler.
The chip is reset as it can no longer execute user code. The second watchdog timeout
triggers system reboot as a new watchdog interrupt is generated while the previous
interrupt is still pending. The application then starts measuring the 15 s interval again.
The three user LEDs are toggled at increasing frequencies until the board is reset or
PUSH1 button is pressed, which restores the LEDs toggling frequency with the 15 s
watchdog timer.
Wakeup
: The watchdog timer is a 32-bit down counter that divides the clock input (32.768
kHz) and produces an interrupt whenever the counter reaches zero. The counter is then
reloaded with the content of the WDT_LR register. If the interrupt status flag is not cleared
and a new interrupt is generated, then the watchdog may generate a system reset.
This example demonstrates the use of the watchdog to periodically wake the system from
standby mode using the watchdog interrupt. The watchdog is configured to generate the
interrupt at 1 s intervals. The watchdog is then enabled and the system is switched to the
standby mode. As soon as the watchdog interrupt is generated, the system wakes up,
LED1 (IO6 pin) is toggled and the device returns to standby mode. The IO6 pin is therefore
toggled every 1 s.