Telit Wireless Solutions JF2 Hardware User'S Manual Download

Page: 5 / 40

JF2 Hardware User Guide

1vv0300985 Rev.4 2013-04-09

Page 5 of 40

Mod. 0805 2011-07 Rev.2

Contents

Introduction

............................................................................................................ 8

1.1.

Scope

............................................................................................................................. 8

1.2.

Audience

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1.3.

Contact Information, Support

.......................................................................................... 8

1.4.

Document Organization

.................................................................................................. 9

1.5.

Text Conventions

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1.6.

Summary of Contents for JF2

Page 1: ...JF2 Hardware User Guide 1vv0300985 Rev 4 2013 04 09 ...

Page 2: ...e User Guide 1vv0300985 Rev 4 2013 04 09 Reproduction forbidden without written authorization from Telit Communications S p A All Rights Reserved Page 2 of 40 Mod 0805 2011 07 Rev 2 APPLICABILITY TABLE PRODUCT JF2 ...

Page 3: ...ies preserve for Telit and its licensors certain exclusive rights for copyrighted material including the exclusive right to copy reproduce in any form distribute and make derivative works of the copyrighted material Accordingly any copyrighted material of Telit and its licensors contained herein or in the Telit products described in this instruction manual may not be copied reproduced distributed ...

Page 4: ...stem or translated into any language or computer language in any form or by any means without prior written permission of Telit High Risk Materials Components units or third party products used in the product described herein are NOT fault tolerant and are NOT designed manufactured or intended for use as on line control equipment in the following hazardous environments requiring fail safe controls...

Page 5: ...ply Voltage 10 2 1 1 Capacitance 10 2 2 Implementing Pseudo Battery Back up 10 2 3 Understanding ON OFF and SYSTEM ON 11 2 3 1 Auto ON Configuration GPIO8 Control 11 2 4 Reset Design Details 13 3 Example Implementations 14 3 1 Normal Operation Startup and Shutdown 14 3 2 Self Start Operation 14 4 Updating the Firmware Flash Module ONLY 15 5 Updating Patch Code EEPROM and ROM modules with Host Memo...

Page 6: ... of the Pre select SAW Filter 26 9 8 External LNA Gain and Noise Figure 26 9 9 Powering the External LNA active antenna 27 9 10 RF Interference 28 9 11 Shielding 28 10 Reference Design 29 10 1 Flash EEPROM ROM2 0 Reference Design 29 10 1 1 RF 29 10 1 2 Serial Interface 30 10 1 3 Power Control 30 10 2 ROM2 2 9600bps 31 11 Firmware Configuration 32 11 1 Internal LNA 32 11 2 Low Power Modes 32 11 2 1...

Page 7: ... 1 Static Navigation 34 11 5 2 Velocity Dead Reckoning 34 11 5 3 MEMS Static Detection 35 11 5 4 MEMS Wake up 35 11 6 Advanced Features 35 11 6 1 CW Jamming Detection 35 11 6 2 SBAS 35 11 6 3 2 D Acquisition 36 11 6 4 MEMS Compass Heading 36 12 Handling and soldering 37 12 1 Moisture Sensitivity 37 12 2 ESD 38 12 3 Reflow 38 12 4 Assembly Issues 38 13 PCB Layout Details 39 14 Document History 40 ...

Page 8: ...ct Information Support For general contact technical support to report documentation errors and to order manuals contact Telit Technical Support Center TTSC at TS EMEA telit com TS NORTHAMERICA telit com TS LATINAMERICA telit com TS APAC telit com Alternatively use http www telit com en products technical support center contact php For detailed information about where you can buy the Telit modules...

Page 9: ...F2 Chapter 8 MEMS sensor and EEPROM Interface describes the DR I2C interface Chapter 9 RF Front End Design describes in details the characteristics of the Front end Chapter 10 Reference Design gives an overview about the reference design Chapter 11 Firmware configuration describes the configuration settings Chapter 12 Handling and soldering describes packaging and soldering of the module Chapter 1...

Page 10: ... 8 volt supply must be regulated to be within 50 mV of nominal voltage inclusive of load regulation and power supply noise and ripple Noise and ripple outside of these limits can affect GPS sensitivity and also risk tripping the internal voltage supervisors thereby shutting down the JF2 unexpectedly Regulators with very good load regulation are strongly recommended along with adequate power supply...

Page 11: ...r state is desired A single OR gate with one input being SYSTEM ON and the other being an external pulse will allow the module to be turned back on with a suitable pulse but it will not be possible to use a second pulse as it is blocked with the SYSTEM ON signal The only option to place the module in hibernate state is to issue the serial command If full ON OFF control is desired along with having...

Page 12: ... The host system can determine if the J F2 is ready as follows A short pulse on SYSTEM_ON output line indicates to a host that the J F2 is ready and armed to accept an ON_OFF pulse The host can wait a fixed duration Wait at minimum 5 seconds before sending an ON_OFF pulse Note that Telit recommends monitoring SYSTEM_ON The host can issue ON_OFF pulses repeatedly every 100ms and monitor for JF 2 SY...

Page 13: ...n internal reset as appropriate No external reset signal needs to be applied to the JF2 If an external reset is desired the signal must be either open collector or open drain without any form of pullup Do not pull this line high with either a pullup or a driven logic one When this line is pulled low the JF2 will immediately drop into hibernate mode with some loss of data When the external reset is...

Page 14: ...s 3 1 Normal Operation Startup and Shutdown To start the JF2 Send a voltage pulse tolerant to 3 6V to the ON OFF input To go into the shutdown sequence of the JF2 from full power state Send a voltage pulse tolerant to 3 6V to the ON OFF input or Issue an NMEA PSRF117 or OSP MID 205 serial command 3 2 Self Start Operation For self start operation the SYSTEM ON output is connected to the ON OFF inpu...

Page 15: ...nternal flash memory 1 Either remove all power to the module or force the module into hibernate state by pulsing the ON OFF signal Verify the state of the module by monitoring the SYSTEM ON signal 2 Pull the BOOT signal high through a 10K pull up resistor to 1 8 volts 3 Apply main power if not already applied 4 Pulse the ON OFF signal to place the JF2 module into BOOT mode 5 Run the software utili...

Page 16: ...rate for example The desired patch data file must be distributed to the end user device where it may be accessed by the Host processor The Host processor in the end user device is required to run software that sends patch data from the patch file to the module using OSP Patch Protocol messages over the host serial port Example source code to assist in the implementation of a patch downloader on th...

Page 17: ... the standard SPI interface The following features also use the same GPIOs as the SPI flash interface therefore only one feature can be used at a time MEMS sensors I2C EEPROM Antenna sensing Baud Rate Detection The SPI interface clocking and data transport are completely controlled by software and are not at a fixed rate Because of the methods used to access the SPI flash the time required to stor...

Page 18: ...mode or I2C mode depending upon how the JF2 GPIO6 and GPIO7 pins are strapped at power up Either leave the pin floating apply a 10K resistor to 1 8V PU or apply a 10K resistor to GND PD Reference the JF2 SPI_UART_I2C Application Note for additional details on Serial Interface configuration and operation Mode GPIO6 internal pull down GPIO7 internal pull up UART PU Leave floating or PU I2C Leave flo...

Page 19: ...6 pin can be left open or pulled low Upon power the JF2 acts as a master transmitter and a slave receiver Pull ups to a 1 8V to 3 6V power supply in the range of 1K to 2 2K are required on the RXA and TXA lines when used in I2C mode In this mode the pins are defined below Signal Name I2C Function RXA I2C Data DIO TXA I2C Clock CLK Table 4 I2C Pin Assignments Bit rates to 400K are achievable Note t...

Page 20: ...07 Rev 2 7 3 SPI Mode If both the GPIO6 and GPIO7 pins are left floating the JF2 will power up in slave SPI mode supporting both SPI and Microwire formats In this mode the four pins are defined below Signal Name SPI Function GPIO7 SPI Chip Select CS GPIO6 SPI Clock CLK RXA SPI Data In MOSI TXA SPI Data Out MISO Table 5 SPI Mode Pin Assignments NOTE Data rates of 6 8 MHz are achievable ...

Page 21: ...r or magnetometer Pullup resistors of approximately 2 2Kohm to 1 8 volts are required on the DR I2C CLK and DR I2C IO lines for proper operation Only an approved accelerometer KIONIX part number KXTF9 4100 3 x 3mm LGA 1 8V 3 axis accelerometer and FREESCALE part number MMA8450Q can be used The interrupt output of the accelerometer must be connected to GPIO4 of the JF2 Data for the approved magneti...

Page 22: ...F2 can find the necessary satellites download the necessary ephemeris data and compute the location within a 5 minute period In the GPS signal acquisition process downloading and decoding the data is the most difficult task which is why Cold Start acquisition requires a higher signal level than navigation or tracking signal levels For the purposes of this discussion autonomous operation is assumed...

Page 23: ...ariable attenuation is highly dependent upon GPS satellite location If enough satellites are blocked say at a lower elevation or all in a general direction the geometry of the remaining satellites will result is a lower accuracy of position The JF2 reports this geometry in the form of PDOP HDOP and VDOP For example in a vehicular application the GPS antenna may be placed embedded into the dashboar...

Page 24: ...are patch antenna on a reference ground plane usually 70mm by 70mm will give an antenna gain at zenith of 5 dBic A smaller 18mm by 18mm square patch on a reference ground plane usually 50mm by 50mm will give an antenna gain at zenith of 2 dBic While an antenna vendor will specify a nominal antenna gain usually at zenith or directly overhead they should supply antenna pattern curves specifying gain...

Page 25: ...dB Some of the factors in the system noise figure are implementation losses due to quantization and other factors and don t scale with improved front end noise figure 9 5 Active versus Passive Antenna If the GPS antenna is placed near the JF2 and the RF traces losses are not excessive nominally 1 dB then a passive antenna can be used This would normally be the lowest cost option and most of the ti...

Page 26: ... which is generally true in band but would not be true out of band If there is extra gain associated with the external filter then a 6 dB Pi or T resistive attenuator is suggested to improve the impedance match between the two components 9 8 External LNA Gain and Noise Figure The JF2 can be used with an external LNA such as what might be found in an active antenna Because of the internal LNA the o...

Page 27: ...ood quality RF capacitor again operating at self resonance at the L1 frequency The second approach is to use a quarter wave stub in place of the inductor The length of the stub is designed to be exactly a quarter wavelength which has the effect of making an RF short at L1 at one end of the stub to appear as an RF open The RF short is created by the good quality RF capacitor operating at self reson...

Page 28: ...le a popular netbook computer uses an Atom processor clocked at 1 6 GHz This is only 25 MHz away from the GPS signal and depending upon temperature of the SAW filter can be within the passband of the GPS receiver Because of the nature of the address and data lines this would be broadband digital noise at a relatively high level Such devices are required to adhere to a regulatory standard for emiss...

Page 29: ... minimum number of signals required to operate the JF2 properly are four digital signals and one RF signal 10 1 1 RF The RF input can be connected directly to a GPS passive antenna The reference design shows a DC power feed for an active antenna o C5 is used to block the DC voltage from entering the JF2 o The inductor L1 is chosen to be self resonant at the GPS frequency 1 57542 GHz to minimize lo...

Page 30: ...he LNA can be turned off This is a 1 8 volt logic level ON OFF is an input to control the power state of the JF2 Upon first applying power the JF2 enters the hibernate state with SYSTEM ON low Wait for the FSM_Ready_Pulse FIGURE 1 on the SYSTEM ON line which indicates that the JF2 is ready to accept an ON OFF pulse Then ON OFF can be pulsed high for minimum of 100 microseconds to change the power ...

Page 31: ...ten authorization from Telit Communications S p A All Rights Reserved Page 31 of 40 Mod 0805 2011 07 Rev 2 10 2 ROM2 2 9600bps The JF2 ROM2 2 9600bps variant does not support external EEPROM connection or MEMS connection Note that if a SPI flash is connected the baud rate defaults to 4800 ...

Page 32: ...n incorrect parameter could render the JF2 inoperable Contact Telit technical support if this approach is required in your system 11 2 Low Power Modes The JF2 module can be operated in one of four power management modes Full Power TricklePowerTM Push To FixTM and Micro Power The latter three of these modes offer progressively lower power consumption profiles Depending upon the requirements of the ...

Page 33: ...4800 9600 19200 38400 57600 115200 230400 and 460800 bps 11 3 1 NMEA Protocol Considerations The lower UART baud rates are typically used for NMEA protocol Note should be taken however of the bandwidth limitation at 4800 baud By default the JF2 module communicates using NMEA at 4800 baud with the periodic output messages limited to the GGA GSA and RMC messages at once per second and the GSV messag...

Page 34: ... when the velocity falls below a threshold indicating that the receiver is stationary The heading is also frozen and the velocity is reported as 0 The solution is then unpinned when the velocity increases above a threshold or when the computed position is a set distance from the pinned position indicating that the receiver is in motion again Note that these velocity and distance thresholds cannot ...

Page 35: ...module detects tracks and removes narrow band interfering signals jammers without the need for external components or tuning It monitors a frequency band that is 4MHz from the L1 frequency for jammers Any number of jammers that occur outside of a 1MHz center band are removed by the JF2 with a 2MHz band pass filter Up to eight jammers inside this center band are removed using a notch filter Data re...

Page 36: ...e is significantly higher than that the horizontal position estimate will be noticeably impacted To accommodate applications for which these situations are a concern a version of JF2 firmware is offered that requires a calculated altitude i e a 3 D navigational solution in order for the receiver to first enter navigation 11 6 4 MEMS Compass Heading The JF2 module incorporates a feature that reads ...

Page 37: ...opening the hermetic seal provided the factory conditions are less than 30 C and less than 60 and the humidity indicator card indicates less than 10 relative humidity If the package has been opened or the humidity indicator card indicates above 10 then the parts will need to be baked prior to reflow The parts may be baked at 125 C 5 C for 48 hours However the trays nor the tape and reel can withst...

Page 38: ...e reflow profile must not exceed the profile given IPC JEDEC J STD 020 Table 5 2 Classification Reflow Profiles Although IPC JEDEC J STD 020 allows for three reflows the assembly process for the JF2 uses one of those profiles Thus the JF2 is limited to two reflows Note JEDEC standards are available for free from the JEDEC website http www jedec org When reflowing a dual sided SMT board it is impor...

Page 39: ...05 2011 07 Rev 2 13 PCB Layout Details The PCB footprint on the receiving board should match the JF2 pad design shown below The solder mask opening is generally determined by the component geometry of other parts on the board and can be followed here Standard industry practice is to use a paste mask stencil opening the same dimensions as the pad design Figure 4 JF2 Pad Design ...

Page 40: ...ge 40 of 40 Mod 0805 2011 07 Rev 2 14 Document History Revision Date Changes 0 2011 01 19 First issue 1 2012 11 14 Made corrections for Figure 2 2 2012 11 29 Added ON_OFF notes in section 2 3 and update Figure 4 and 10 1 3 2013 03 19 Updated ON OFF section and added ROM2 2 features 4 2013 04 05 Update section 10 Reference Design and remove Baud Rate Detection ...

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