lists the host SPI timing parameters.
Table 8-10. Host SPI Timing Parameters
PARAMETER
NUMBER
DESCRIPTION
MIN
MAX
UNIT
T1
F
Clock frequency at V
BAT
= 3.3 V
20
MHz
Clock frequency at V
BAT
= 2.3 V
12
T2
t
clk
Clock period
50
ns
T3
t
LP
Clock low period
25
ns
T4
t
HT
Clock high period
25
ns
T5
D
Duty cycle
45%
55%
T6
t
IS
RX data setup time
4
ns
T7
t
IH
RX data hold time
4
ns
T8
t
OD
TX data output delay
20
ns
T9
t
OH
TX data hold time
24
ns
8.16.2 Host UART Interface
The SimpleLink device requires the UART configuration described in
.
Table 8-11. SimpleLink™ UART Configuration
PROPERTY
SUPPORTED CC3135 CONFIGURATION
Baud rate
115200 bps, no auto-baud rate detection, can be changed by the host up to 3 Mbps using a special command
Data bits
8 bits
Flow control
CTS/RTS
Parity
None
Stop bits
1
Bit order
Least significant bit (LSB) first
Host interrupt polarity
Active high
Host interrupt mode
Rising edge or level 1
Endianness
Little-endian only
(1)
The SimpleLink device does not support automatic detection of the host length while using the UART interface.
8.16.2.1 5-Wire UART Topology
shows the typical 5-wire UART topology comprised of four standard UART lines plus one IRQ line
from the device to the host controller to allow efficient low power mode.
shows the typical and recommended UART topology because it offers the maximum communication
reliability and flexibility between the host and the SimpleLink device.
HOST MCU
UART
CC3135MOD
UART
nRTS
nCTS
TX
RX
HOST_INTR(IRQ)
nRTS
nCTS
TX
RX
HOST_INTR(IRQ)
Figure 8-10. Typical 5-Wire UART Topology
SWRS225D – FEBRUARY 2019 – REVISED MAY 2021
30
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