4-4
Z380
™
U
SER
'
S
M
ANUAL
DC-8297-03
Z
ILOG
4.2.5 Indexed (X)
When the Indexed addressing mode is used, the data
processed is at the location whose address is the contents
of IX or IY in use, offset by an 8-bit signed displacement in
the instruction.
The Indexed address is computed by adding the 8-bit
two’s complement signed displacement specified in the
instruction to the contents of the IX or IY register in use, also
specified by the instruction. Indexed addressing allows
random access to tables or other complex data structures
where the address of the base of the table is known, but the
particular element index must be computed by the pro-
gram.
The offset portion can be expanded to 16 or 24 bits,
instead of eight bits by using DDIR Immediate Data Direc-
tives (DDIR IB for 16-bit offset, DDIR IW for 24-bit offset).
Note that computation of the effective address is affected
by the operation mode (Native or Extended). In Native
mode, address computation is done in modulo 2
16
, and in
Extended mode, address computation is done in modulo
2
32
.
Address calculation: In Native mode, 0FFH encoding in
the instruction is sign extended to a 16-bit value before the
address calculation, but calculation is done in modulo 2
16
and does not take into account the index register’s
extended portion.
0000
+
FFFF
FFFF
Instruction
REGISTER
MEMORY
OPERATION REGISTER
→
ADDRESS
→
+
OPERAND
DISPLACEMENT
_____________________________________
↑
Example of X mode:
1.
Load accumulator from location (IX-1) in Native mode
LD A, (IX-1)
;Load into the accumulator the
;contents of the memory location
;whose address is one less than
;the contents of IX
;Assume it is in Native mode
A
IXz
IX
Before instruction execution
01
0001
0000
After instruction execution
23
0001
0000
Memory location
0001FFFF
23
