54 Register-Based Programming
Appendix B
NOTE
It is necessary to write a “0” to bit 0 after the reset has been performed
before any other commands can be programmed and executed.
To disable the interrupt generated when channels are closed, write a “1” to
bit 6 of the Status/Control Register (base +04
h
).
NOTE
Typically, interrupts are only disabled to “peek-poke” a module. Refer to
the operating manual of the command module used before disable the
interrupt.
Channel Enable
Registers
Writes to the Channel Enable registers (base +10
h
to 1A
h
) enables you to
close the desired channel to COMmon (see Figure B-1). For example, write
a “1” to bits 3 and 2 of the (base +12
h
) Module 00 Bank 3-5 Channel Enable
register to close channel 33 on the RF Multiplexer Module. All other bits
must be set to “0”. Only one channel per bank can be closed at a time. Any
bit pattern not shown in Table B-1 results in the lowest-numbered channel
being closed to COMmon.
Table B-1. Manufacturer ID Register
b+00
h
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Write
Undefined
Read*
Manufacturer ID
* Returns FFFF
h
= Hewlett-Packard A16 only register-based.
Table B-2. Device Type Register
b+02
h
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Write
Undefined
Read
0180
h
Table B-3. Status/Control Registers
b+04
h
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Write*
Undefined
D
Undefined
R
Read**
Undefined
B
D
Undefined
* R = Switch reset to power-on state (channel 0 to COMmon all banks) by writing (1) in bit #0.
* D = Disable Interrupt by writing (1) in bit #6.
* * B = Status “busy” is (0) in bit #7.
* * D = Status “Interrupt disable” is (1) in bit #6.
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