Remote Control Reference
4-21
Bit
Decimal
Value
Definition
0
OPC
1
Operation accomplished. All commands prior to and
including
*OPC
have been executed.
1
Not Used
0
Always set to 0.
2
QYE
4
Query Error. The power supply tried to read the output
buffer, which is empty. Or, a new command line was
received before a preceding query had been read. Or, the
I/O buffers are full.
3
DDE
8
Device Error. A self-test or calibration error occurred.
4
EXE
16
Execution Error. An execution error occurred. The Error
codes are within -211 to -221.
5
CME
32
Command Error. A command syntax error occurred. The
Error codes are within -101 to -178.
6
Not used
0
Always set to 0.
7
PON
128
Power On. Power has been turned off and on since the
last time the event register was read or cleared.
In addition, the Standard Event register will be cleared under the following conditions.
Execute
*CLS
.
Use
*ESR?
to query the event register. For example, 28 (4 + 8 + 16) is returned when the
status of the Standard Event register has been queried, and QYE, DDE, and EXE
condition have occurred.
In addition, the Standard Event Enable register will be cleared under the following conditions.
Execute
*ESE 0.
Turn on the power supply, use
*PSC 1
to configure the power supply.
Note
You can’t clear the enable register at power-on if you have previously configured
the power supply with
*PSC 0
.
4.3.2.3 The Status Byte Register
The Status Byte summary register can generate conditions from the other status registers.
Querying data that is waiting in the output buffer of the power supply is going to be
immediately generated through the “Message Available” bit (bit4) of the Status Byte register.
In addition, bits in the summary register are not locked. Clearing an event register will also
clear the corresponding bits in the Status Byte summary register. Reading all messages in the
output buffer and any pending queries will clear the message available bit.
Bit
Decimal
Value
Definition
0-2
Not Used
0
Always set to 0.
3
QUES
8
One or more bits are set in the Questionable Status register
(bits must be enabled in the enable register.)
4
MAV
16
Data is available in the output buffer.
5
ESB
32
One or more bits are set in the Standard Event register (bits
must be enabled in the enable register.)
6
RQS
64
The power supply is requiring service (Serial Poll).
7
Not Used
0
Always set to 0.
When executing
*CLS
, the Status Byte summary register will be cleared. Using
*ESR?
to
query the Standard Event register will clear only bit 5 in the Status Byte summary register. For
