Remote Interface Reference
3
SCPI Status Registers
E3632A User’s Guide
115
To interrupt your bus controller using SRQ
1
Send a device clear message to clear the power supply’s
output buffer (for example,
CLEAR 705
).
2
Clear the event registers with the
*CLS
(clear status)
command.
3
Set up the enable register masks. Execute the
*ESE
command to set up the Standard Event register and the
*SRE
command for the Status Byte.
4
Send the
*OPC?
(operation complete query) command and
enter the result to ensure synchronization.
5
Enable your bus controller’s IEEE- 488 SRQ interrupt.
To determine when a command sequence is completed
1
Send a device clear message to clear the power supply’s
output buffer (for example,
CLEAR 705
).
2
Clear the event registers with the
*CLS
(clear status)
command.
3
Enable the “Operation Complete” bit (bit 0) in the
Standard Event register by executing the
*ESE 1
command.
4
Send the
*OPC?
(operation complete query) command and
enter the result to ensure synchronization.
5
Execute your command string to program the desired
configuration, and then execute the
*OPC
(operation
complete) command as the last command. When the
command sequence is completed, the “Operation
Complete” bit (bit 0) is set in the Standard Event register.
6
Use a serial poll to check when bit 5 (Standard Event) is
set in the Status Byte summary register. You could also
configure the power supply for an SRQ interrupt by
sending
*SRE 32
(Status Byte Enable register, bit 5).
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