Microchip Technology ay-3-8910, Data Manual

Page 1: ...able Sound Generator PSG data Manual This was scanned and converted using adobe capture and adobe acrobat to convert it into a pdf Keep in mind that the OCR function is not perfect and you should be c...

Page 2: ...AY 3 8910 8912 PROGRAMMABLE SOUND GENERATOR DATA MANUAL...

Page 3: ...vided by 2 to yield 1 MHZ to allow for lower noise frequencies This eliminates the need for an external clock as shown on page 33 Note Pages 3 4 30 31 60 64 have been excluded The booklet does include...

Page 4: ...The PSG is easily interfaced to any bus oriented system Its flexibility makes it useful in applications such as music synthesis sound effects generation audible alarms tonesignalling and FSK modems Th...

Page 5: ...needed to Scope cause the AY 3 8910 8912 Programmable Sound Generator to per form in its intended fashion All of the programs programming and hardware designs have been tested to ensure that the metho...

Page 6: ...ry and as such occupy a 16 word block out of 1 024 possible addresses The 10 address bits 8 bits on the common data address bus and 2 separate address bits A8 and A9 are decoded as follows i The four...

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Page 9: ...nerator One for each chan nel A B C provides the D A Converters with either a fixed or variable amplitude pattern The fixed amplitude is under direct CPU control the variable amplitude is accomplished...

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Page 11: ...e AY 3 8910 is supplied in a 40 lead dual in line package with the pm assignments as shown in Fig 4 The AY 3 8912 is supplied in a28 lead dual in line package with the pin assignments as shown in Fig...

Page 12: ...use of these extra address lines they may be leftunconnected as each is provided with either an on chip pull down A9 or pull up A8 resistor In noisy environments however it is recommended that A9 and...

Page 13: ...als is the output of its corresponding D A Converter and provides an up to 1V peak peak signal representing the complex sound waveshape generated by the PSG IOA7 IOAO input output pins 14 21 AY 3 8910...

Page 14: ...me This is accomplished by the processor issuing bus control signals previ ously described defining the state of the bus the PSG then decodes these signals to perform the requested task The conditioni...

Page 15: ...on and relative timing of the PSG control sequences are described in the following paragraphs in all exam ples BC2 has been assumed to be tied to logic 1 5V 2 5 1 ADDRESS PSG REGISTER SEQUENCE The Lat...

Page 16: ...G sequence would also normally follow immediately after an address sequence The four principal microstates of the read sequence are 1 send NACT inactive 2 send DTB read from PSG 3 read data on bus 4 s...

Page 17: ...riod Control and select envelope pattern 3 1 The frequency of each square wave generated by the three Tone Tone Generator Generators one each for Channels A B and C is obtained in the PSG by first cou...

Page 18: ...The equations describing the relationship between the desired output tone frequency and the input clock frequency and Tone Period value are...

Page 19: ...ue This B bit value consists of the lower 5 bits B4 B0 of register R6 as illustrated in the following Noise Period Register R6 Note that the 6 bit value in R11 is a period value the higher the value i...

Page 20: ...d tone frequencies for each of the three channels The determination of combining neither either both noise and tone frequencies on each Register R7 channel is made by the state of bits B5 B0 of R7 The...

Page 21: ...when M 0 When fixed level amplitude isselected it is fixed only in the sense that the amplitude level is under the direct control of the system processor via bits D3 D0 Varying the amplitude when in...

Page 22: ...ig 6 graphically illustrates a selection of variable level envelope controlled amplitude where the 16 levels directly reflect the output of the Envelope Generator A fixed level amplitude would corresp...

Page 23: ...RIOD CONTROL Registers R13 R14 The frequency of the envelope is obtained in the PSG by first counting down the input clock by 256 then by further counting down the result by the programmed 16 bit Enve...

Page 24: ...d by defining a single cycle or repeat cycle pattern This envelope shape cycle control is contained in the lower 4 bits B3 B0 of register R15 Each of these 4 bits controls a function in the envelope g...

Page 25: ...l reset to 0000 after one cycle and hold at that count To further describe the above functions could be accomplished by numerous charts of the binary count sequence of E3 E2 E1 E0 for each combination...

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Page 27: ...f R7 to 1 3 Latch address R16 select IOA register 4 Write data to PSG data to be output on I O Port A To input data from I O Port A to the CPU bus would require the following 1 Latch address R7 select...

Page 28: ...ation voltage range of from 0 to 1 Volt The specific amplitude control of each of the three D A Converters isaccomplished by the three sets of 4 bit outputs of the Amplitude Control block while the Mi...

Page 29: ...r or microcomputer and drive directly into analog audio circuitry It provides the link between the computer and a speaker to provide sounds or sound effects derived from digital inputs The following p...

Page 30: ...standard color burst crystal a Clock CD4089 CMOS inverter and a CD4013 to divide the color burst Generation frequency in half The clock produced for the PSG runs at a 1 7897725MHz rate Depending on t...

Page 31: ...summed together to enable complex waveforms to becomposed and amplified through a single external amplifier These channels may be individually amplified through separate channels for more exotic soun...

Page 32: ...ta DA7 DA0 Latch address 1 1 1 00000111 Latch R7 to program I O Ports Write to PSG 1 1 0 01000000 Set B7 B6 to 0 1 respectively Latch address 1 1 1 00001110 Latch R16 to address memory Write to PSG 1...

Page 33: ...and the system processor Microcomputer BC1 BC2 and BDIR are bus control signals generated by the Interface processor to direct all bus operations These operations are identi fied as Latch Address Wri...

Page 34: ...it as shown operates with manual keyboard selections As Fig 19 shows the design for the interface connects directly to the output pins of the 1650 and the BC1 BC2 BDIR pins The software then has the r...

Page 35: ...4 6 Interfacing to the PIC 1650 Cont...

Page 36: ...Fig 19 PIC 1650 AY 3 6910 SYSTEM EXAMPLE...

Page 37: ...OM s contained elsewhere in the system The CP1600 1610 also acts as the bus controller developing the necessary timing for the AY 3 8910 4 7 1 WRITE DATA ROUTINE The program necessary to write to a se...

Page 38: ...Fig 20 CP1600 1610 AY 3 8910 INTERFACE...

Page 39: ...0 8912 4 8 1 LATCH ADDRESS ROUTINE AT ENTRY B HAS ADDRESS VALUE LATCH CLRA STAA 8005 GET D DIR A LDAA FF STAA 8004 OUTPUTS LDAA 4 STAA 8005 GET PERIPHERAL A STAB 8004 FORM ADDR STAA 8006 CLRA STAA 800...

Page 40: ...Fig 21 M6800 AY 3 8910 INTERFACE...

Page 41: ...RESS ROUTINE PORTADDR EQU 80H ADDRESS TRANSFER PORT ADDRESS PORTDATA EQU 81H DATA TRANSFER PORT ADDRESS THIS ROUTINE WILL TRANSFER THE CONTENTS OF 8080 REGISTER C TO THE PSG ADDRESS REGISTER PSGBAR MO...

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Page 43: ...and counterpoint vastly increases the quality of the sound This feature is easily achieved in the PSG since three channels are provided each independently programmable Note 5 1 Since notes are formed...

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Page 45: ...it right for each higher octave For example the effect will be that a tune written to play on a piano will sound like bells if a multiple octave up modification is performed 5 3 2 KEY One measure of t...

Page 46: ...key changes on two notes which are played with the main note These relationships are illustrated in Fig 24 which lists the various note constants which will produce musical chords A chord with a parti...

Page 47: ...he note loses volume If all of the notes can be decayed at a uniform rate the automatic envelope generator can be set to produce a decaying waveform Each of the three channels can have the same decay...

Page 48: ...envelopes for organ voicing All functions are controlled by a microcomputer The basis of this system consists of a master frequency generator with a string of dividers This produces all frequencies fo...

Page 49: ...Matrix is used to select any preprogrammed rhythm pattern and tempo from the PIC The Instrument Select switches allow manual in out selection of the 8910 s via the A8 and A9 address lines providing a...

Page 50: ...ed on a 1 78977MHz PSG clock 6 1 Many effects are possible using only the tone generation capability of Tone Only the PSG without adding noise and without using the PSG s envelope generation capabilit...

Page 51: ...channels operating with the same parameters Fig 28 GUNSHOT SOUND EFFECT CHART Octal Register Load Value Explanatlon Any not specified 000 R6 017 Set Noise period to mid value R7 007 Enable Noise only...

Page 52: ...7 ELECTRICAL SPECIFICATIONS...

Page 53: ...the processor For example the Wolf Whistle effect in Fig 32 shows two channels in use to add constant breath hissing noise to the three concentrated frequency sweeps of the whistle Once the noise is p...

Page 54: ...7 ELECTRICAL SPECIFICATIONS...

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