2 ARCHITECTURE
The AY-3-8910/8912 is a register oriented Programmable Sound
Generator (PSG). Communication between the processor and the
PSG is based on the concept of memory-mapped I/O. Control
commands are issued to the PSG by writing to 16 memory-mapped
registers. Each of the 16 registers within the PSG is also readable so
that the microprocessor can determine, as necessary, present states
or stored data values.
All functions of the PSG are controlled through its 16 registers which
once programmed, generate and sustain thesounds, thus freeing the
system processor for other tasks.
2 . 1
An internal block diagram of the PSG showing the various functional
Basic
blocks and data flow is shown in Fig. 2.
Functional
Blocks
2.1.1 REGISTER ARRAY
The principal element of the PSG is the array of 16 read/write control
registers. These 16 registers look to the CPU as a block of memory
and as such occupy a 16 word block out of 1,024 possible addresses.
The 10 address bits (8 bits on the common data/address bus, and 2
separate address bits A8 and *A9) are decoded as follows:
The four low order address bits select one of the 16 registers
The six high order address bits function as “chip selects” to
control the tri-state bidirectional buffers (when the high order
address bits are “incorrect”, the bidirectional
are forced to a
high impedance state). High order address bits A9 A8 are fixed in the
PSG design to recognize a 01 code; high order address bits
DA4 may be mask-programmed to any 4-bit code by a special order
factory mask modification. Unless otherwise specified, address bits
are programmed to recognize only a 0000 code. A valid
high order address latches the register address (the low order 4 bits)
in the Register Address Latch/Decoder block. A latched address will
remain valid until the receipt of a new address, enabling multiple
reads and writes of the same register contents without the need for
redundant re-addressing.
Summary of Contents for ay-3-8910
Page 2: ...AY 3 8910 8912 PROGRAMMABLE SOUND GENERATOR DATA MANUAL...
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Page 35: ...4 6 Interfacing to the PIC 1650 Cont...
Page 36: ...Fig 19 PIC 1650 AY 3 6910 SYSTEM EXAMPLE...
Page 38: ...Fig 20 CP1600 1610 AY 3 8910 INTERFACE...
Page 40: ...Fig 21 M6800 AY 3 8910 INTERFACE...
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Page 52: ...7 ELECTRICAL SPECIFICATIONS...
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