LENA-R8 series - System integration manual
UBX-22015376 - R02
Design-in
Page 78 of 116
C1-Public
Providing 2 UARTs with TXD and RXD lines only
☞
Providing the
TXD
and
RXD
lines only is not recommended if the multiplexer functionality is used
in the application: providing also at least the HW flow control (
RTS
/
CTS
lines) is recommended,
and it is in particular necessary if the low power mode is enabled by +UPSV AT command.
The auxiliary secondary UART interface is disabled by default, and it can be enabled by dedicated AT
command (see the u-blox AT commands manual
, +USIO AT command) as alternative function of
the
DTR
,
DSR
,
DCD
and
RI
pins of the main primary UART interface, in mutually exclusive way.
If the HW flow-control functionality is not required in the application, or the lines are not available:
•
Connect the module HW flow-control input line to GND: since the module requires HW flow-control
active (low electrical level) if HW flow-control is enabled (AT&K3, which is the default setting).
If RS-232 compatible signal levels are needed, two Maxim MAX13234E voltage level translators can
be used. These chips translate voltage levels from 1.8 V (module side) to the RS-232 standard.
If a 1.8 V application processor is used, the circuit should be implemented as described in
TxD
Application Processor
(1.8V DTE)
RxD
RTS
CTS
TxD
RxD
RTS
CTS
GND
LENA-R8 series
(1.8V DCE)
12
TXD
(UART data input)
9
DTR
(AUX UART data input)
13
RXD
(UART data ouput)
10
RTS
(UART flow ctrl input)
11
CTS
(UART flow ctrl output)
8
DCD
(AUX UART data ouput)
6
DSR
(AUX UART flow ctrl input)
7
RI
(AUX UART flow ctrl output)
GND
0
Ω
TP
0
Ω
TP
UART1
UART2
0
Ω
TP
0
Ω
TP
100
Ω
Figure 57: 2 UART interfaces application circuit without HW flow control in DTE/DCE serial communications (1.8 V DTE)
If a 3.0 V application processor (DTE) is used, then it is recommended to connect the 1.8 V UART
interfaces of the module (DCE) by means of appropriate unidirectional voltage translators using the
module
V_INT
output as 1.8 V supply for the voltage translators on the module side, as in
4
V_INT
TxD
Application Processor
(3.0V DTE)
RxD
RTS
CTS
TxD
RxD
RTS
CTS
GND
LENA-R8 series
(1.8V DCE)
12
TXD
(UART data input)
9
DTR
(AUX UART data input)
13
RXD
(UART data output)
10
RTS
(UART flow ctrl input)
11
CTS
(UART flow ctrl output)
8
DCD
(AUX UART data output)
6
DSR
(AUX UART flow ctrl input)
7
RI
(AUX UART flow ctrl output)
GND
1V8
B1
A1
GND
U1
VCCB
VCCA
Unidirectional
voltage translator
C1
C2
3V0
OEn
DIR1
VCC
B2
A2
DIR2
1V8
B1
A1
GND
U2
VCCB
VCCA
Unidirectional
voltage translator
C3
C4
3V0
DIR1
OEn
B2
A2
DIR2
0
Ω
TP
0
Ω
TP
TP
UART1
UART2
0
Ω
TP
0
Ω
TP
100
Ω
Figure 58: 2 UART interfaces application circuit without HW flow control in DTE/DCE serial communications (3.0 V DTE)
Reference
Description
Part number - Manufacturer
C1, C2, C3, C4
100 nF Capacitor Ceramic
Various Manufacturers
U1, U2
Unidirectional voltage translator
SN74AVC2T245
10
- Texas Instruments
Table 41: Components for 2 UARTs application circuit without HW flow ctrl in DTE/DCE serial communications (3.0 V DTE)
10
Voltage translator providing partial power down feature, so the 3 V supply can be also ramped up before
V_INT
1.8 V supply
