SOM MIO Design Considerations
The Zynq Ult MPSoC on the SOM has a set of integrated, built-in interface IPs. These interface IPs are made available to
external pins through multiplexed I/O (MIO) selection, which can be selected and customized for a carrier card design. The MIO
interface configuration is set as part of the Vivado design project through the Vivado processor configuration wizard (PCW).
The design of the SOM carrier card must give special consideration to the MIO pins to ensure that the desired MIO peripherals are
mappable to the physical pins defined by the electrical design of the carrier card. The SOM fixes the mapping of MIO bank 500 for
SOM based peripherals and a subset of bank 501 for SOM power management signals. The remaining MIO pins are configurable for
flexibility in the carrier card design. The full MIO peripheral IP mapping to physical pin mapping is defined in the MIO Interfaces table in
Zynq Ult Device Technical Reference Manual (
MIO Bank 500
The SOM fixed MIO configurations for bank 500 are outlined in the following table. This MIO configuration is defined by the physical
SOM design and cannot be modified by carrier-card designers. It defines the MIO configuration for the SOM peripherals: QSPI, TPM
SPI, LEDs, eMCC, and I2C configuration bus.
Bank
500
MIO #
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Peripheral
QSPI
SPI1
GPIO0
SPI1
GPIO0
eMMC (SD0)
GPIO0
I2C1
Pin Fct
sclk_out
miso_mo1
mo2
mo3
mosi_mi0
n_ss_out
sclk_out
LED0
LED1
n_ss_out
miso
mosi
FW_Upd
data[0]
data[1]
data[2]
data[3]
data[4]
data[5]
data[6]
data[7]
cmd_out
clk_out
eMMC_Rst
scl
sda
MIO Bank 500 – Extensible I2C Bus
This MIO configuration must be considered fixed and will be pre-populated in the corresponding SOM Vivado board files. In SOM
bank 500, predefined configuration of the PS I2C interface is made available to the carrier card via the I2C_SCK and I2C_SDA signals
on the som_240_1 connector. If the carrier card does not need to extend this I2C bus, the carrier card should leave them as no
connects. If the carrier card design extends this bus, they need to ensure they do not introduce an address conflict with the I2C
devices on the SOM. The I2C devices are defined in the corresponding table of the Kria K26 SOM Data Sheet (
).
Chapter 2: Electrical Design Considerations
UG1091 (v1.0) April 20, 2021
Carrier Card Design for Kria SOM
32
