Curtiss-Wright FHF5-PC4MWB04-00 Hardware Reference Manual Download

Page: 34 / 101

OPERATION

4-2

FibreXtreme Hardware Reference

FPDP signals are embedded into the control words of a frame. The FPDP signals

transported across are: /NRDY, /DIR, /SYNC, PIO1 and PIO2. A /SUSPEND signal is

synthesized by the transmit state machine in response to how full the receive FIFO is—

this is not the /SUSPEND from an FPDP port.
All FPDP signals, with the exclusion of /SYNC, are passed around the receive FIFO, and

are not synchronized with the data stream. For PCI variations of this card, the FPDP

signals can be read from a register once they are received from the link.

4.2.2 Transmit Operation

The transmit operation first has to collect data in the transmit FIFO for transmission. On

PCI-based cards, this means that either data is PIO’d into the Transmit FIFO or a DMA

transaction is set up to fill the FIFO. FPDP cards collect any data words accompanied by

/DVALID on the FPDP interface. Once a data word is in the FIFO, transmission can

begin. The framing-state machine first checks that there is no data in the retransmit FIFO

and that the remote node is not telling this node to back off. If it is clear to send, after it

transmits the next SOF it will begin filling the data frame as full as possible (up to 2048

bytes). The data is then encoded and sent out across the link. If there is data in the

Retransmit FIFO or the card is being backed off from the destination, then the card waits

until both conditions are clear before it starts transmission. Note that SYNC and SWDV

can also be transmitted by the link logic and these two types of synchronization

primitives are handled by the Transmit FIFO and transmit control logic in a similar

method as standard data. Specifically, they are written to the link logic through the same

interface, passed through the same internal link logic path, and are used in the assembly

of link frames in a similar fashion, although the maximum frame size does differ for these

types of associated Serial FPDP frames.
All FPDP signals, with the exclusion of /SYNC, are passed around the transmit FIFO,

and are not synchronized with the data stream. For PCI variations of this card, the FPDP

signals can be written to a register and then transmitted across the link.

4.2.3 Loop Operation

In the Loop Operation discussion below, SL100/SL240 is used generically to refer to any

Curtiss-Wright Controls, Inc. SL100/SL240 card (PCI, PMC, or CMC). Anything that

applies to only a specific SL100/SL240 product will be noted as such.
Loop operation with the SL100/SL240 acts like a virtual FPDP bus where one source (the

loop master) can transmit to any number of receive nodes. The link protocol is the same for

this operation, except any node in the loop may assert a suspend request embedded in this

data stream. This implies that if one node on the loop is not ready to receive data, the source

is backed off for all nodes. This is the same way that multi-drop FPDP busses function.
The fundamental difference between a loop master and a receiving node is the loop master

does not have its loop retransmission enabled. Therefore, to the loop master, it appears as if

it is still in a point-to-point connection with a single node. Receiving nodes, on the other

hand, have knowledge that they are in a loop configuration and must be configured as such.

Note that the loop master receives all the data it transmits, so data can either be checked for

errors or ignored when it is received. This checking (beyond verification of CRC and

8B/10B decoding validity) is not done in the SL100/SL240 and must be implemented by the

system designer.
The receivers on the loop can choose to collect the data or ignore it off the loop. If the

Receive FIFO is enabled (the node is collecting data), a suspend request may be asserted by

this node as the data passes through. If it is not configured to receive the data, it simply

passes the data through the Retransmit FIFO without modifying the suspend request.